159 lines
3.7 KiB
C
159 lines
3.7 KiB
C
/*
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* Copyright (c) 2022 Grant Ramsay <grant.ramsay@hotmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT espressif_esp32_mdio
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#include <soc.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/mdio.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/kernel.h>
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#include <zephyr/logging/log.h>
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#include <esp_mac.h>
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#include <hal/emac_hal.h>
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#include <hal/emac_ll.h>
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LOG_MODULE_REGISTER(mdio_esp32, CONFIG_MDIO_LOG_LEVEL);
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#define PHY_OPERATION_TIMEOUT_US 1000
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struct mdio_esp32_dev_data {
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struct k_sem sem;
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emac_hal_context_t hal;
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};
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struct mdio_esp32_dev_config {
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const struct pinctrl_dev_config *pcfg;
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};
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static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t regad,
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bool write, uint16_t data_in, uint16_t *data_out)
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{
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struct mdio_esp32_dev_data *const dev_data = dev->data;
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k_sem_take(&dev_data->sem, K_FOREVER);
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if (emac_ll_is_mii_busy(dev_data->hal.mac_regs)) {
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LOG_ERR("phy busy");
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k_sem_give(&dev_data->sem);
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return -EBUSY;
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}
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if (write) {
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emac_ll_set_phy_data(dev_data->hal.mac_regs, data_in);
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}
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emac_hal_set_phy_cmd(&dev_data->hal, prtad, regad, write);
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/* Poll until operation complete */
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bool success = false;
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for (uint32_t t_us = 0; t_us < PHY_OPERATION_TIMEOUT_US; t_us += 100) {
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k_sleep(K_USEC(100));
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if (!emac_ll_is_mii_busy(dev_data->hal.mac_regs)) {
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success = true;
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break;
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}
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}
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if (!success) {
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LOG_ERR("phy timeout");
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k_sem_give(&dev_data->sem);
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return -ETIMEDOUT;
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}
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if (!write && data_out != NULL) {
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*data_out = emac_ll_get_phy_data(dev_data->hal.mac_regs);
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}
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k_sem_give(&dev_data->sem);
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return 0;
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}
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static int mdio_esp32_read(const struct device *dev, uint8_t prtad, uint8_t regad,
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uint16_t *data)
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{
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return mdio_transfer(dev, prtad, regad, false, 0, data);
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}
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static int mdio_esp32_write(const struct device *dev, uint8_t prtad,
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uint8_t regad, uint16_t data)
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{
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return mdio_transfer(dev, prtad, regad, true, data, NULL);
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}
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static void mdio_esp32_bus_enable(const struct device *dev)
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{
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ARG_UNUSED(dev);
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}
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static void mdio_esp32_bus_disable(const struct device *dev)
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{
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ARG_UNUSED(dev);
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}
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static int mdio_esp32_initialize(const struct device *dev)
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{
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const struct mdio_esp32_dev_config *const cfg = dev->config;
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struct mdio_esp32_dev_data *const dev_data = dev->data;
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int res;
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k_sem_init(&dev_data->sem, 1, 1);
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res = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
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if (res != 0) {
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goto err;
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}
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const struct device *clock_dev =
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DEVICE_DT_GET(DT_CLOCKS_CTLR(DT_NODELABEL(mdio)));
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clock_control_subsys_t clock_subsys =
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(clock_control_subsys_t)DT_CLOCKS_CELL(DT_NODELABEL(mdio), offset);
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res = clock_control_on(clock_dev, clock_subsys);
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if (res != 0) {
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goto err;
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}
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/* Only the mac registers are required for MDIO */
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dev_data->hal.mac_regs = &EMAC_MAC;
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/* Init MDIO clock */
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emac_hal_set_csr_clock_range(&dev_data->hal, esp_clk_apb_freq());
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return 0;
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err:
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return res;
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}
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static const struct mdio_driver_api mdio_esp32_driver_api = {
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.read = mdio_esp32_read,
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.write = mdio_esp32_write,
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.bus_enable = mdio_esp32_bus_enable,
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.bus_disable = mdio_esp32_bus_disable,
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};
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#define MDIO_ESP32_CONFIG(n) \
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static const struct mdio_esp32_dev_config mdio_esp32_dev_config_##n = { \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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};
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#define MDIO_ESP32_DEVICE(n) \
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PINCTRL_DT_INST_DEFINE(n); \
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MDIO_ESP32_CONFIG(n); \
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static struct mdio_esp32_dev_data mdio_esp32_dev_data##n; \
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DEVICE_DT_INST_DEFINE(n, \
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&mdio_esp32_initialize, \
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NULL, \
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&mdio_esp32_dev_data##n, \
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&mdio_esp32_dev_config_##n, POST_KERNEL, \
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CONFIG_MDIO_INIT_PRIORITY, \
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&mdio_esp32_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(MDIO_ESP32_DEVICE)
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