Jimmy Zheng f4fe84e112 soc: andestech: ae350: support 2 PLIC instances (PLIC, PLIC-SW) ... Andes AE350 integrates 2 PLICs in the platfrom, one for external interrupt and another for IPI. Adusted Kconfig for total IRQ numbers and support 2 aggregators in the 2nd level interrupt controller. Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>		2024-10-23 16:53:13 +02:00
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common_linker	…
CMakeLists.txt	…
Kconfig	…
Kconfig.defconfig	soc: andestech: ae350: support 2 PLIC instances (PLIC, PLIC-SW)	2024-10-23 16:53:13 +02:00
Kconfig.defconfig.ae350	…
Kconfig.soc	…
linker.ld	soc: andestech: linker.ld: fix incorrect padding of rom_mpu_padding	2024-10-23 16:53:13 +02:00
pma.c	soc: riscv: andes_v5: fix PMA compilation warnings	2024-09-21 12:23:39 +01:00
soc_context.h	…
soc_irq.S	…
soc_offsets.h	…
soc_v5.h	…
start.S	…