212 lines
8.2 KiB
CMake
212 lines
8.2 KiB
CMake
set(COMMON_ZEPHYR_LINKER_DIR ${ZEPHYR_BASE}/cmake/linker_script/common)
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set_ifndef(region_min_align CONFIG_CUSTOM_SECTION_MIN_ALIGN_SIZE)
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# Set alignment to CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE if not set above
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# to make linker section alignment comply with MPU granularity.
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set_ifndef(region_min_align CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
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# If building without MPU support, use default 4-byte alignment.. if not set above.
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set_ifndef(region_min_align 4)
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# Note, the `+ 0` in formulas below avoids errors in cases where a Kconfig
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# variable is undefined and thus expands to nothing.
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math(EXPR FLASH_ADDR
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"${CONFIG_FLASH_BASE_ADDRESS} + ${CONFIG_FLASH_LOAD_OFFSET} + 0"
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OUTPUT_FORMAT HEXADECIMAL
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)
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if(CONFIG_FLASH_LOAD_SIZE GREATER 0)
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math(EXPR FLASH_SIZE
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"(${CONFIG_FLASH_LOAD_SIZE} + 0) - (${CONFIG_ROM_END_OFFSET} + 0)"
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OUTPUT_FORMAT HEXADECIMAL
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)
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else()
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math(EXPR FLASH_SIZE
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"(${CONFIG_FLASH_SIZE} + 0) * 1024 - (${CONFIG_FLASH_LOAD_OFFSET} + 0) - (${CONFIG_ROM_END_OFFSET} + 0)"
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OUTPUT_FORMAT HEXADECIMAL
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)
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endif()
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set(RAM_ADDR ${CONFIG_SRAM_BASE_ADDRESS})
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math(EXPR RAM_SIZE "(${CONFIG_SRAM_SIZE} + 0) * 1024" OUTPUT_FORMAT HEXADECIMAL)
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math(EXPR IDT_ADDR "${RAM_ADDR} + ${RAM_SIZE}" OUTPUT_FORMAT HEXADECIMAL)
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# ToDo: decide on the optimal location for this.
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# linker/ld/target.cmake based on arch, or directly in arch and scatter_script.cmake can ignore
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zephyr_linker(FORMAT "elf32-littlearm")
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zephyr_linker(ENTRY ${CONFIG_KERNEL_ENTRY})
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zephyr_linker_memory(NAME FLASH FLAGS rx START ${FLASH_ADDR} SIZE ${FLASH_SIZE})
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zephyr_linker_memory(NAME RAM FLAGS wx START ${RAM_ADDR} SIZE ${RAM_SIZE})
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zephyr_linker_memory(NAME IDT_LIST FLAGS wx START ${IDT_ADDR} SIZE 2K)
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# Only use 'rw' as FLAGS. It's not used anyway.
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dt_comp_path(paths COMPATIBLE "zephyr,memory-region")
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foreach(path IN LISTS paths)
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zephyr_linker_dts_memory(PATH ${path} FLAGS rw)
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endforeach()
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if(CONFIG_XIP)
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zephyr_linker_group(NAME ROM_REGION LMA FLASH)
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set(rom_start ${FLASH_ADDR})
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set(XIP_ALIGN_WITH_INPUT ALIGN_WITH_INPUT)
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else()
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zephyr_linker_group(NAME ROM_REGION LMA RAM)
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set(rom_start ${RAM_ADDR})
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endif()
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zephyr_linker_group(NAME RAM_REGION VMA RAM LMA ROM_REGION)
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zephyr_linker_group(NAME TEXT_REGION GROUP ROM_REGION SYMBOL SECTION)
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zephyr_linker_group(NAME RODATA_REGION GROUP ROM_REGION)
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zephyr_linker_group(NAME DATA_REGION GROUP RAM_REGION SYMBOL SECTION)
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# should go to a relocation.cmake - from include/linker/rel-sections.ld - start
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zephyr_linker_section(NAME .rel.plt HIDDEN)
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zephyr_linker_section(NAME .rela.plt HIDDEN)
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zephyr_linker_section(NAME .rel.dyn)
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zephyr_linker_section(NAME .rela.dyn)
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# should go to a relocation.cmake - from include/linker/rel-sections.ld - end
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# Discard sections for GNU ld.
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zephyr_linker_section_configure(SECTION /DISCARD/ INPUT ".plt")
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zephyr_linker_section_configure(SECTION /DISCARD/ INPUT ".iplt")
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zephyr_linker_section_configure(SECTION /DISCARD/ INPUT ".got.plt")
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zephyr_linker_section_configure(SECTION /DISCARD/ INPUT ".igot.plt")
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zephyr_linker_section_configure(SECTION /DISCARD/ INPUT ".got")
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zephyr_linker_section_configure(SECTION /DISCARD/ INPUT ".igot")
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zephyr_linker_section(NAME .rom_start ADDRESS ${rom_start} GROUP ROM_REGION NOINPUT)
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zephyr_linker_section(NAME .text GROUP TEXT_REGION)
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zephyr_linker_section_configure(SECTION .rel.plt INPUT ".rel.iplt")
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zephyr_linker_section_configure(SECTION .rela.plt INPUT ".rela.iplt")
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zephyr_linker_section_configure(SECTION .text INPUT ".TEXT.*")
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zephyr_linker_section_configure(SECTION .text INPUT ".gnu.linkonce.t.*")
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zephyr_linker_section_configure(SECTION .text INPUT ".glue_7t")
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zephyr_linker_section_configure(SECTION .text INPUT ".glue_7")
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zephyr_linker_section_configure(SECTION .text INPUT ".vfp11_veneer")
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zephyr_linker_section_configure(SECTION .text INPUT ".v4_bx")
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if(CONFIG_CPP)
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zephyr_linker_section(NAME .ARM.extab GROUP ROM_REGION)
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zephyr_linker_section_configure(SECTION .ARM.extab INPUT ".gnu.linkonce.armextab.*")
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endif()
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zephyr_linker_section(NAME .ARM.exidx GROUP ROM_REGION)
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# Here the original linker would check for __GCC_LINKER_CMD__, need to check toolchain linker ?
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#if(__GCC_LINKER_CMD__)
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zephyr_linker_section_configure(SECTION .ARM.exidx INPUT ".gnu.linkonce.armexidx.*")
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#endif()
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include(${COMMON_ZEPHYR_LINKER_DIR}/common-rom.cmake)
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include(${COMMON_ZEPHYR_LINKER_DIR}/thread-local-storage.cmake)
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zephyr_linker_section(NAME .rodata GROUP RODATA_REGION)
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zephyr_linker_section_configure(SECTION .rodata INPUT ".gnu.linkonce.r.*")
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if(CONFIG_USERSPACE AND CONFIG_XIP)
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zephyr_linker_section_configure(SECTION .rodata INPUT ".kobject_data.rodata*")
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endif()
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zephyr_linker_section_configure(SECTION .rodata ALIGN 4)
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# ToDo - . = ALIGN(_region_min_align);
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# Symbol to add _image_ram_start = .;
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# This comes from ramfunc.ls, via snippets-ram-sections.ld
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zephyr_linker_section(NAME .ramfunc GROUP RAM_REGION SUBALIGN 8)
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# Todo: handle MPU_ALIGN(_ramfunc_size);
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# ToDo - handle if(CONFIG_USERSPACE)
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zephyr_linker_section(NAME .data GROUP DATA_REGION)
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zephyr_linker_section_configure(SECTION .data INPUT ".kernel.*")
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include(${COMMON_ZEPHYR_LINKER_DIR}/common-ram.cmake)
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#include(kobject.ld)
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if(NOT CONFIG_USERSPACE)
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zephyr_linker_section(NAME .bss VMA RAM LMA FLASH TYPE BSS)
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zephyr_linker_section_configure(SECTION .bss INPUT COMMON)
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zephyr_linker_section_configure(SECTION .bss INPUT ".kernel_bss.*")
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# As memory is cleared in words only, it is simpler to ensure the BSS
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# section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
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zephyr_linker_section_configure(SECTION .bss ALIGN 4)
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zephyr_linker_section(NAME .noinit GROUP RAM_REGION TYPE NOLOAD NOINIT)
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# This section is used for non-initialized objects that
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# will not be cleared during the boot process.
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zephyr_linker_section_configure(SECTION .noinit INPUT ".kernel_noinit.*")
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endif()
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include(${COMMON_ZEPHYR_LINKER_DIR}/ram-end.cmake)
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zephyr_linker_symbol(SYMBOL __kernel_ram_start EXPR "(@__bss_start@)")
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zephyr_linker_symbol(SYMBOL __kernel_ram_end EXPR "(${RAM_ADDR} + ${RAM_SIZE})")
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zephyr_linker_symbol(SYMBOL __kernel_ram_size EXPR "(@__kernel_ram_end@ - @__bss_start@)")
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zephyr_linker_symbol(SYMBOL _image_ram_start EXPR "(${RAM_ADDR})" SUBALIGN 32) # ToDo calculate 32 correctly
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zephyr_linker_symbol(SYMBOL ARM_LIB_STACKHEAP EXPR "(${RAM_ADDR} + ${RAM_SIZE})" SIZE -0x1000)
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set(VECTOR_ALIGN 4)
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if(CONFIG_CPU_CORTEX_M_HAS_VTOR)
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math(EXPR VECTOR_ALIGN "4 * (16 + ${CONFIG_NUM_IRQS})")
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if(${VECTOR_ALIGN} LESS 128)
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set(VECTOR_ALIGN 128)
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else()
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pow2round(VECTOR_ALIGN)
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endif()
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endif()
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zephyr_linker_section_configure(
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SECTION .rom_start
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INPUT ".exc_vector_table*"
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".gnu.linkonce.irq_vector_table*"
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".vectors"
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OFFSET ${CONFIG_ROM_START_OFFSET}
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KEEP FIRST
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SYMBOLS _vector_start _vector_end
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ALIGN ${VECTOR_ALIGN}
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PRIO 50
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)
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dt_chosen(chosen_itcm PROPERTY "zephyr,itcm")
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if(DEFINED chosen_itcm)
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dt_node_has_status(status_result PATH ${chosen_itcm} STATUS okay)
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if(${status_result})
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zephyr_linker_group(NAME ITCM_REGION VMA ITCM LMA ROM_REGION)
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zephyr_linker_section(NAME .itcm GROUP ITCM_REGION SUBALIGN 4)
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endif()
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endif()
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dt_chosen(chosen_dtcm PROPERTY "zephyr,dtcm")
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if(DEFINED chosen_dtcm)
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dt_node_has_status(status_result PATH ${chosen_dtcm} STATUS okay)
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if(${status_result})
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zephyr_linker_group(NAME DTCM_REGION VMA DTCM LMA ROM_REGION)
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zephyr_linker_section(NAME .dtcm_bss GROUP DTCM_REGION SUBALIGN 4 TYPE BSS)
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zephyr_linker_section(NAME .dtcm_noinit GROUP DTCM_REGION SUBALIGN 4 TYPE NOLOAD NOINIT)
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zephyr_linker_section(NAME .dtcm_data GROUP DTCM_REGION SUBALIGN 4)
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endif()
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endif()
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zephyr_linker_section(NAME .ARM.attributes ADDRESS 0 NOINPUT)
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zephyr_linker_section_configure(SECTION .ARM.attributes INPUT ".ARM.attributes" KEEP)
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zephyr_linker_section_configure(SECTION .ARM.attributes INPUT ".gnu.attributes" KEEP)
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# armlink specific flags
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zephyr_linker_section_configure(SECTION .text ANY FLAGS "+RO" "+XO")
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zephyr_linker_section_configure(SECTION .data ANY FLAGS "+RW")
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zephyr_linker_section_configure(SECTION .bss ANY FLAGS "+ZI")
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include(${COMMON_ZEPHYR_LINKER_DIR}/debug-sections.cmake)
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dt_comp_path(paths COMPATIBLE "zephyr,memory-region")
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foreach(path IN LISTS paths)
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zephyr_linker_dts_section(PATH ${path})
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endforeach()
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