102 lines
2.5 KiB
C
102 lines
2.5 KiB
C
/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/sensor.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/gpio.h>
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#define MAX30101_REG_INT_STS1 0x00
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#define MAX30101_REG_INT_STS2 0x01
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#define MAX30101_REG_INT_EN1 0x02
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#define MAX30101_REG_INT_EN2 0x03
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#define MAX30101_REG_FIFO_WR 0x04
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#define MAX30101_REG_FIFO_OVF 0x05
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#define MAX30101_REG_FIFO_RD 0x06
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#define MAX30101_REG_FIFO_DATA 0x07
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#define MAX30101_REG_FIFO_CFG 0x08
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#define MAX30101_REG_MODE_CFG 0x09
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#define MAX30101_REG_SPO2_CFG 0x0a
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#define MAX30101_REG_LED1_PA 0x0c
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#define MAX30101_REG_LED2_PA 0x0d
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#define MAX30101_REG_LED3_PA 0x0e
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#define MAX30101_REG_PILOT_PA 0x10
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#define MAX30101_REG_MULTI_LED 0x11
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#define MAX30101_REG_TINT 0x1f
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#define MAX30101_REG_TFRAC 0x20
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#define MAX30101_REG_TEMP_CFG 0x21
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#define MAX30101_REG_PROX_INT 0x30
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#define MAX30101_REG_REV_ID 0xfe
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#define MAX30101_REG_PART_ID 0xff
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#define MAX30101_INT_PPG_MASK (1 << 6)
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#define MAX30101_FIFO_CFG_SMP_AVE_SHIFT 5
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#define MAX30101_FIFO_CFG_FIFO_FULL_SHIFT 0
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#define MAX30101_FIFO_CFG_ROLLOVER_EN_MASK (1 << 4)
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#define MAX30101_MODE_CFG_SHDN_MASK (1 << 7)
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#define MAX30101_MODE_CFG_RESET_MASK (1 << 6)
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#define MAX30101_SPO2_ADC_RGE_SHIFT 5
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#define MAX30101_SPO2_SR_SHIFT 2
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#define MAX30101_SPO2_PW_SHIFT 0
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#define MAX30101_PART_ID 0x15
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#define MAX30101_BYTES_PER_CHANNEL 3
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#define MAX30101_MAX_NUM_CHANNELS 3
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#define MAX30101_MAX_BYTES_PER_SAMPLE (MAX30101_MAX_NUM_CHANNELS * \
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MAX30101_BYTES_PER_CHANNEL)
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#define MAX30101_SLOT_LED_MASK 0x03
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#define MAX30101_FIFO_DATA_BITS 18
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#define MAX30101_FIFO_DATA_MASK ((1 << MAX30101_FIFO_DATA_BITS) - 1)
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enum max30101_mode {
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MAX30101_MODE_HEART_RATE = 2,
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MAX30101_MODE_SPO2 = 3,
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MAX30101_MODE_MULTI_LED = 7,
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};
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enum max30101_slot {
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MAX30101_SLOT_DISABLED = 0,
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MAX30101_SLOT_RED_LED1_PA,
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MAX30101_SLOT_IR_LED2_PA,
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MAX30101_SLOT_GREEN_LED3_PA,
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MAX30101_SLOT_RED_PILOT_PA,
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MAX30101_SLOT_IR_PILOT_PA,
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MAX30101_SLOT_GREEN_PILOT_PA,
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};
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enum max30101_led_channel {
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MAX30101_LED_CHANNEL_RED = 0,
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MAX30101_LED_CHANNEL_IR,
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MAX30101_LED_CHANNEL_GREEN,
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};
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enum max30101_pw {
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MAX30101_PW_15BITS = 0,
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MAX30101_PW_16BITS,
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MAX30101_PW_17BITS,
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MAX30101_PW_18BITS,
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};
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struct max30101_config {
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struct i2c_dt_spec i2c;
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uint8_t fifo;
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uint8_t spo2;
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uint8_t led_pa[MAX30101_MAX_NUM_CHANNELS];
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enum max30101_mode mode;
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enum max30101_slot slot[4];
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};
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struct max30101_data {
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uint32_t raw[MAX30101_MAX_NUM_CHANNELS];
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uint8_t map[MAX30101_MAX_NUM_CHANNELS];
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uint8_t num_channels;
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};
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