121 lines
3.1 KiB
C
121 lines
3.1 KiB
C
/*
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* Copyright (c) 2013-2015, Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Board configuration macros for the ia32_pci platform
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*
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* This header file is used to specify and describe board-level aspects for
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* the 'ia32_pci' platform.
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*/
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#ifndef __SOC_H_
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#define __SOC_H_
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#include <misc/util.h>
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#ifndef _ASMLANGUAGE
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#include <device.h>
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#include <drivers/rand32.h>
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#endif
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#ifdef CONFIG_IOAPIC
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#include <drivers/ioapic.h>
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#if defined(CONFIG_UART_IRQ_FALLING_EDGE)
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#define UART_IRQ_FLAGS (IOAPIC_EDGE | IOAPIC_LOW)
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#elif defined(CONFIG_UART_IRQ_RISING_EDGE)
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#define UART_IRQ_FLAGS (IOAPIC_EDGE | IOAPIC_HIGH)
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#elif defined(CONFIG_UART_IRQ_LEVEL_HIGH)
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#define UART_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_HIGH)
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#elif defined(CONFIG_UART_IRQ_LEVEL_LOW)
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#define UART_IRQ_FLAGS (IOAPIC_LEVEL | IOAPIC_LOW)
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#endif
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#endif /* CONFIG_IOAPIC */
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#define NUM_STD_IRQS 16 /* number of "standard" IRQs on an x86 platform */
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#define INT_VEC_IRQ0 0x20 /* Vector number for IRQ0 */
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/*
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* The irq_connect() API connects to a (virtualized) IRQ and the
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* associated interrupt controller is programmed with the allocated vector.
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* The Quark board virtualizes IRQs as follows:
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*
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* - The first CONFIG_IOAPIC_NUM_RTES IRQs are provided by the IOAPIC
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* - The remaining IRQs are provided by the LOAPIC.
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*
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* Thus, for example, if the IOAPIC supports 24 IRQs:
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*
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* - IRQ0 to IRQ23 map to IOAPIC IRQ0 to IRQ23
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* - IRQ24 to IRQ29 map to LOAPIC LVT entries as follows:
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*
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* IRQ24 -> LOAPIC_TIMER
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* IRQ25 -> LOAPIC_THERMAL
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* IRQ26 -> LOAPIC_PMC
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* IRQ27 -> LOAPIC_LINT0
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* IRQ28 -> LOAPIC_LINT1
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* IRQ29 -> LOAPIC_ERROR
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*/
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/* PCI definitions */
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#define PCI_BUS_NUMBERS 2
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#define PCI_CTRL_ADDR_REG 0xCF8
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#define PCI_CTRL_DATA_REG 0xCFC
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#define PCI_INTA 1
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#define PCI_INTB 2
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#define PCI_INTC 3
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#define PCI_INTD 4
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/**
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*
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* @brief Convert PCI interrupt PIN to IRQ
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*
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* The routine uses "standard design consideration" and implies that
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* INTA (pin 1) -> IRQ 16
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* INTB (pin 2) -> IRQ 17
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* INTC (pin 3) -> IRQ 18
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* INTD (pin 4) -> IRQ 19
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*
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* @return IRQ number, -1 if the result is incorrect
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*
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*/
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static inline int pci_pin2irq(int pin)
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{
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if ((pin < PCI_INTA) || (pin > PCI_INTD))
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return -1;
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return NUM_STD_IRQS + pin - 1;
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}
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/**
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*
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* @brief Convert IRQ to PCI interrupt pin
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*
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* @return pin number, -1 if the result is incorrect
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*
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*/
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static inline int pci_irq2pin(int irq)
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{
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if ((irq < NUM_STD_IRQS) || (irq > NUM_STD_IRQS + PCI_INTD - 1))
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return -1;
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return irq - NUM_STD_IRQS + 1;
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}
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#endif /* __SOC_H_ */
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