340 lines
7.2 KiB
Plaintext
340 lines
7.2 KiB
Plaintext
/*
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* Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv8-m.dtsi>
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#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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#include <mem.h>
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#include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-m33f";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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};
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};
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};
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};
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&sram {
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#address-cells = <1>;
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#size-cells = <1>;
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sramx: memory@4000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x4000000 DT_SIZE_K(16)>;
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zephyr,memory-region = "SRAMX";
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};
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sram0: memory@20000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x20000000 DT_SIZE_K(32)>;
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zephyr,memory-region = "SRAM0";
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};
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sram1: memory@20008000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x20008000 DT_SIZE_K(16)>;
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zephyr,memory-region = "SRAM1";
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};
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sram2: memory@2000c000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x2000c000 DT_SIZE_K(16)>;
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zephyr,memory-region = "SRAM2";
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};
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usb_sram: memory@20010000 {
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/* Connected to USB bus*/
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x20010000 DT_SIZE_K(16)>;
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zephyr,memory-region = "USB_SRAM";
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
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};
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};
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&peripheral {
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#address-cells = <1>;
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#size-cells = <1>;
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syscon: syscon@0 {
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compatible = "nxp,lpc-syscon";
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reg = <0x0 0x4000>;
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#clock-cells = <1>;
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reset: reset {
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compatible = "nxp,lpc-syscon-reset";
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#reset-cells = <1>;
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};
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};
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iap: flash-controller@34000 {
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compatible = "nxp,iap-fmc55";
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reg = <0x34000 0x18>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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reg = <0x0 DT_SIZE_K(246)>;
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erase-block-size = <512>;
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write-block-size = <512>;
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};
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flash_reserved: flash@3d800 {
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compatible = "soc-nv-flash";
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reg = <0x0003d800 DT_SIZE_K(10)>;
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status = "disabled";
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};
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uuid: flash@9fc70 {
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compatible = "nxp,lpc-uid";
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reg = <0x3fc70 0x10>;
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};
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boot_rom: flash@3000000 {
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compatible = "soc-nv-flash";
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reg = <0x3000000 DT_SIZE_K(128)>;
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};
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};
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iocon: iocon@1000 {
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compatible = "nxp,lpc-iocon";
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reg = <0x1000 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x1000 0x100>;
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pinctrl: pinctrl {
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compatible = "nxp,lpc-iocon-pinctrl";
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};
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};
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gpio: gpio@8c000 {
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compatible = "nxp,lpc-gpio";
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reg = <0x8c000 0x2488>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio0: gpio@0 {
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compatible = "nxp,lpc-gpio-port";
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reg = <0>;
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int-source = "pint";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio1: gpio@1 {
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compatible = "nxp,lpc-gpio-port";
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reg = <1>;
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int-source = "pint";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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pint: pint@4000 {
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compatible = "nxp,pint";
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reg = <0x4000 0x1000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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interrupts = <4 2>, <5 2>, <6 2>, <7 2>,
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<32 2>, <33 2>, <34 2>, <35 2>;
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num-lines = <8>;
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num-inputs = <64>;
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};
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ctimer0: ctimer@8000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x8000 0x1000>;
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interrupts = <10 0>;
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status = "disabled";
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clk-source = <3>;
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clocks = <&syscon MCUX_CTIMER0_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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};
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ctimer1: ctimer@9000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x9000 0x1000>;
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interrupts = <11 0>;
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status = "disabled";
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clk-source = <3>;
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clocks = <&syscon MCUX_CTIMER1_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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};
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ctimer2: ctimer@28000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x28000 0x1000>;
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interrupts = <36 0>;
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status = "disabled";
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clk-source = <3>;
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clocks = <&syscon MCUX_CTIMER2_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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};
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ctimer3: ctimer@29000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x29000 0x1000>;
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interrupts = <13 0>;
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status = "disabled";
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clk-source = <3>;
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clocks = <&syscon MCUX_CTIMER3_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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};
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ctimer4: ctimer@2A000 {
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compatible = "nxp,lpc-ctimer";
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reg = <0x2A000 0x1000>;
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interrupts = <37 0>;
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status = "disabled";
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clk-source = <3>;
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clocks = <&syscon MCUX_CTIMER4_CLK>;
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mode = <0>;
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input = <0>;
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prescale = <0>;
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};
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flexcomm0: flexcomm@86000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x86000 0x1000>;
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interrupts = <14 0>;
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clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 11)>;
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status = "disabled";
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};
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flexcomm1: flexcomm@87000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x87000 0x1000>;
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interrupts = <15 0>;
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clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 12)>;
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status = "disabled";
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};
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flexcomm2: flexcomm@88000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x88000 0x1000>;
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interrupts = <16 0>;
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clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 13)>;
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status = "disabled";
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};
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flexcomm3: flexcomm@89000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x89000 0x1000>;
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interrupts = <17 0>;
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clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 14)>;
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status = "disabled";
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};
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flexcomm4: flexcomm@8a000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x8a000 0x1000>;
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interrupts = <18 0>;
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clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 15)>;
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status = "disabled";
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};
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flexcomm5: flexcomm@96000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x96000 0x1000>;
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interrupts = <19 0>;
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clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 16)>;
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status = "disabled";
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};
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flexcomm6: flexcomm@97000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x97000 0x1000>;
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interrupts = <20 0>;
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clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 17)>;
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status = "disabled";
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};
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flexcomm7: flexcomm@98000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x98000 0x1000>;
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interrupts = <21 0>;
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clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 18)>;
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status = "disabled";
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};
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can0: can@9d000 {
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compatible = "nxp,lpc-mcan";
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reg = <0x9d000 0x1000>;
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interrupts = <43 0>, <44 0>;
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interrupt-names = "int0", "int1";
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clocks = <&syscon MCUX_MCAN_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 7)>;
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bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>;
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status = "disabled";
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};
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hs_lspi: spi@9f000 {
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compatible = "nxp,lpc-spi";
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reg = <0x9f000 0x1000>;
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interrupts = <59 0>;
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clocks = <&syscon MCUX_HS_SPI_CLK>;
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resets = <&reset NXP_SYSCON_RESET(2, 28)>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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rng: rng@3a000 {
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compatible = "nxp,lpc-rng";
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reg = <0x3a000 0x1000>;
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status = "okay";
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};
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usbhs: usbhs@144000 {
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compatible = "nxp,lpcip3511";
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reg = <0x94000 0x1000>;
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interrupts = <47 1>;
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num-bidir-endpoints = <6>;
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status = "disabled";
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};
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usbphy1: usbphy@38000 {
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compatible = "nxp,usbphy";
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reg = <0x38000 0x1000>;
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status = "disabled";
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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