76 lines
1.7 KiB
Plaintext
76 lines
1.7 KiB
Plaintext
/*
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* Copyright (c) 2018 Seitz & Associates
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/f3/stm32f3.dtsi>
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/ {
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soc {
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i2c2: i2c@40005800 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
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interrupts = <33 0>, <34 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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label= "I2C_2";
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};
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i2c3: i2c@40007800 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40007800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>;
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interrupts = <72 0>, <73 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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label= "I2C_3";
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};
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spi2: spi@40003800 {
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compatible = "st,stm32-spi-fifo";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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interrupts = <36 5>;
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status = "disabled";
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label = "SPI_2";
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};
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spi3: spi@40003c00 {
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compatible = "st,stm32-spi-fifo";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0X40003c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
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interrupts = <51 5>;
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status = "disabled";
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label = "SPI_3";
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};
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timers1: timers@40012c00 {
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compatible = "st,stm32-timers";
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reg = <0x40012c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000800>;
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status = "disabled";
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label = "TIMERS_1";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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st,prescaler = <10000>;
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label = "PWM_1";
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#pwm-cells = <2>;
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};
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};
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};
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};
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