457699cd3c
Unlike other NXP SoCs currently in Zephyr, the mimxrt1052 has the ARM MPU rather than the NXP MPU. Start out by enabling it with a simple set of memory regions for "flash" (ITCM), "ram" (DTCM), and the peripheral buses. More regions will need to be added when we implement support for external memories. Tested with: - samples/mpu/mpu_stack_guard_test - tests/kernel/mem_protect/protection Signed-off-by: Maureen Helm <maureen.helm@nxp.com> |
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.. | ||
CMakeLists.txt | ||
Kconfig.defconfig.mimxrt1052 | ||
Kconfig.defconfig.series | ||
Kconfig.series | ||
Kconfig.soc | ||
arm_mpu_mem_cfg.h | ||
arm_mpu_regions.c | ||
linker.ld | ||
soc.c | ||
soc.h |