84 lines
1.7 KiB
C
84 lines
1.7 KiB
C
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Full C support initialization
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*
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*
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* Initialization of full C support: zero the .bss, copy the .data if XIP,
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* call z_cstart().
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*
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* Stack is available in this module, but not the global data/bss until their
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* initialization is performed.
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*/
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#include <zephyr/types.h>
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#include <zephyr/toolchain.h>
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#include <zephyr/linker/linker-defs.h>
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#include <zephyr/arch/arc/v2/aux_regs.h>
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#include <zephyr/kernel_structs.h>
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#include <kernel_internal.h>
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/* XXX - keep for future use in full-featured cache APIs */
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#if 0
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/**
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* @brief Disable the i-cache if present
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*
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* For those ARC CPUs that have a i-cache present,
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* invalidate the i-cache and then disable it.
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*/
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static void disable_icache(void)
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{
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unsigned int val;
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val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
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val &= 0xff; /* version field */
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if (val == 0) {
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return; /* skip if i-cache is not present */
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}
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z_arc_v2_aux_reg_write(_ARC_V2_IC_IVIC, 0);
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__builtin_arc_nop();
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z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, 1);
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}
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/**
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* @brief Invalidate the data cache if present
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*
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* For those ARC CPUs that have a data cache present,
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* invalidate the data cache.
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*/
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static void invalidate_dcache(void)
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{
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unsigned int val;
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val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
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val &= 0xff; /* version field */
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if (val == 0) {
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return; /* skip if d-cache is not present */
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}
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z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDC, 1);
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}
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#endif
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extern FUNC_NORETURN void z_cstart(void);
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/**
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* @brief Prepare to and run C code
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*
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* This routine prepares for the execution of and runs C code.
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*/
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void _PrepC(void)
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{
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z_bss_zero();
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z_data_copy();
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z_cstart();
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CODE_UNREACHABLE;
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}
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