284 lines
8.0 KiB
Plaintext
284 lines
8.0 KiB
Plaintext
# Kconfig - x86 general configuration options
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#
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# Copyright (c) 2014-2015 Wind River Systems, Inc.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# 1) Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer.
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#
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# 2) Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# 3) Neither the name of Wind River Systems nor the names of its contributors
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# may be used to endorse or promote products derived from this software without
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# specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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config X86_32
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def_bool y
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config ARCH_DEFCONFIG
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string
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default "arch/x86/defconfig"
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source "kernel/Kconfig"
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menu "X86 Platform Configuration options"
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choice
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prompt "Platform Selection"
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default PLATFORM_IA32_PCI
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config PLATFORM_GALILEO
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bool "Galileo Gen2"
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select HPET_TIMER
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select EOI_HANDLER_SUPPORTED
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select BOOTLOADER_UNKNOWN
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select PCI
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help
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The Intel® Galileo Gen 2 development board is a microcontroller board
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based on the Intel® Quark™ SoC X1000 application processor, a 32-bit
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Intel® Pentium® brand system on a chip (SoC). It is the first board
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based on Intel® architecture designed to be hardware and software
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pin-compatible with shields designed for the Arduino Uno* R3.
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config PLATFORM_IA32_PCI
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bool "IA32 with PCI"
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select HPET_TIMER
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select EOI_HANDLER_SUPPORTED
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select BOOTLOADER_UNKNOWN
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select PCI
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config PLATFORM_IA32
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bool "IA32"
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select EOI_HANDLER_SUPPORTED
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select BOOTLOADER_UNKNOWN
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endchoice
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choice
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prompt "Intel Processor"
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default CPU_MINUTEIA
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config CPU_ATOM
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bool "Atom"
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select CMOV
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help
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This option signifies the use of a CPU from the Atom family.
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config CPU_MINUTEIA
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bool "Minute IA"
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help
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This option signifies the use of a CPU from the Minute IA family.
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endchoice
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config CPU_MIGHT_SUPPORT_CLFLUSH
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bool
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default n
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help
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If a platform uses a processor that possibly implements CLFLUSH, change
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the default in that platform's config file.
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#FIXME This option is not being used in the current code base.
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config CLFLUSH_INSTRUCTION_SUPPORTED
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bool
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prompt "CLFLUSH instruction supported" if CPU_MIGHT_SUPPORT_CLFLUSH
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depends on CPU_MIGHT_SUPPORT_CLFLUSH
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default n
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help
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Only enable this if the CLFLUSH instruction is supported, so that
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an implementation of _SysCacheFlush() that uses CLFLUSH is made
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available, instead of the one using WBINVD.
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menu "Platform Capabilities"
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config ADVANCED_IDLE_SUPPORTED
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bool "Advanced Idle Supported"
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default n
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help
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This option signifies that the target supports the ADVANCED_IDLE
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configuration option.
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config EOI_HANDLER_SUPPORTED
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bool "EOI Handler Supported"
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default n
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help
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This option signifies that the target has one or more devices whose
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driver utilizes an "end of interrupt" handler that gets called
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after the standard interrupt handling code. This capability
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can be used by the driver to tell the device that an interrupt
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has been handled (or for other purposes).
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config UNALIGNED_WRITE_UNSUPPORTED
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bool "Unaligned Write Unsupported"
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default n
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help
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This option signifies that the target may not properly decode the
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IA-32 processor's byte enable (BE) lines, resulting in the inability
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to read/write unaligned quantities.
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config LOCK_INSTRUCTION_UNSUPPORTED
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bool "Lock Instruction Unsupported"
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default n
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help
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This option signifies that the target lacks support for the IA-32
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LOCK prefix instruction. Code running on such targets cannot
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use the LOCK prefix to perform read-modify-write operations in an
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atomic manner; such targets must utilize other techniques to perform
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atomic operations (such as locking interrupts).
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config NUM_DYNAMIC_STUBS
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int "Number of dynamic int stubs"
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default 0
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help
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This option specifies the number of interrupt handlers that can be
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installed dynamically using irq_connect().
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config PIC_DISABLE
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bool "Disable PIC"
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default n
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help
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This option disables all interrupts on the PIC
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endmenu
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menu "Processor Capabilities"
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config ISA_IA32
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bool
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default y
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help
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This option signifies the use of a CPU based on the Intel IA-32
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instruction set architecture.
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config IA32_LEGACY_IO_PORTS
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bool
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prompt "Support IA32 legacy IO ports"
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default n
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depends on ISA_IA32
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help
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This option enables IA32 legacy IO ports. Note these are much slower
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than memory access, so they should be used in last resort.
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config CMOV
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def_bool n
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help
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This option signifies the use of an Intel CPU that supports
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the CMOV instruction.
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config CACHE_LINE_SIZE
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int "Cache line size"
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default 64 if CPU_ATOM
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default 0
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help
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Size in bytes of a CPU cache line.
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endmenu
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menu "Floating Point Options"
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config FLOAT
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bool
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prompt "Floating point instructions"
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default n
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help
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This option enables the use of x87 FPU and MMX instructions by
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a task or fiber.
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Disabling this option means that any task or fiber that uses a
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floating point instruction will get a fatal exception.
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config FP_SHARING
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bool
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prompt "Floating point resource sharing"
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depends on FLOAT
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default n
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help
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This option allows multiple tasks and fibers to safely utilize
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floating point hardware resources. Every task or fiber that wishes
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to use floating point instructions (i.e. x87 FPU, MMX, or SSEx) must
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be created with such support already enabled, or must enable this
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support via task_float_enable() or fiber_float_enable() before
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executing these instructions.
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Enabling this option adds 108 bytes to the stack size requirement
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of each task or fiber that utilizes x87 FPU or MMX instructions,
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and adds 464 bytes to the stack size requirement of each task or
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fiber that utilizes SSEx instructions. (The stack size requirement
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of tasks and fibers that do not utilize floating point instructions
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remains unchanged.)
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Disabling this option means that only a single task or fiber may
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utilize x87 FPU, MMX, or SSEx instructions. (The stack size
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requirement of all tasks and fibers remains unchanged.)
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config SSE
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bool
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prompt "SSEx instructions"
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depends on FLOAT
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default n
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help
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This option enables the use of SSEx instructions by a task or fiber.
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Disabling this option means that no task or fiber may use SSEx
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instructions; any such use will result in undefined behavior.
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config SSE_FP_MATH
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bool
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prompt "Compiler-generated SSEx instructions"
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depends on SSE
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default n
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help
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This option allows the compiler to generate SSEx instructions for
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performing floating point math. This can greatly improve performance
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when exactly the same operations are to be performed on multiple
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data objects; however, it can also significantly reduce performance
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when pre-emptive task switches occur because of the larger register
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set that must be saved and restored.
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Disabling this option means that the compiler utilizes only the
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x87 instruction set for floating point operations.
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config XIP
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default n
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endmenu
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source "arch/x86/core/Kconfig"
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endmenu
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if PLATFORM_IA32
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source "arch/x86/platforms/ia32/Kconfig"
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endif
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if PLATFORM_IA32_PCI
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source "arch/x86/platforms/ia32_pci/Kconfig"
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endif
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if PLATFORM_GALILEO
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source "arch/x86/platforms/galileo/Kconfig"
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endif
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source "drivers/Kconfig"
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source "net/Kconfig"
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source "misc/Kconfig"
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