150 lines
3.4 KiB
C
150 lines
3.4 KiB
C
/*
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* Copyright (c) 2018 - 2019 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __RISCV32_LITEX_VEXRISCV_SOC_H_
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#define __RISCV32_LITEX_VEXRISCV_SOC_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/arch/riscv/sys_io.h>
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#ifndef _ASMLANGUAGE
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/* CSR access helpers */
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static inline unsigned char litex_read8(unsigned long addr)
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{
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#if CONFIG_LITEX_CSR_DATA_WIDTH >= 8
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return sys_read8(addr);
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#else
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#error CSR data width less than 8
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#endif
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}
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static inline unsigned short litex_read16(unsigned long addr)
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{
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#if CONFIG_LITEX_CSR_DATA_WIDTH == 8
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return (sys_read8(addr) << 8)
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| sys_read8(addr + 0x4);
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#elif CONFIG_LITEX_CSR_DATA_WIDTH >= 16
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return sys_read16(addr);
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#else
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#error Unsupported CSR data width
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#endif
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}
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static inline unsigned int litex_read32(unsigned long addr)
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{
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#if CONFIG_LITEX_CSR_DATA_WIDTH == 8
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return (sys_read8(addr) << 24)
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| (sys_read8(addr + 0x4) << 16)
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| (sys_read8(addr + 0x8) << 8)
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| sys_read8(addr + 0xc);
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#elif CONFIG_LITEX_CSR_DATA_WIDTH >= 32
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return sys_read32(addr);
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#else
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#error Unsupported CSR data width
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#endif
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}
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static inline uint64_t litex_read64(unsigned long addr)
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{
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#if CONFIG_LITEX_CSR_DATA_WIDTH == 8
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return (((uint64_t)sys_read8(addr)) << 56)
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| ((uint64_t)sys_read8(addr + 0x4) << 48)
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| ((uint64_t)sys_read8(addr + 0x8) << 40)
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| ((uint64_t)sys_read8(addr + 0xc) << 32)
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| ((uint64_t)sys_read8(addr + 0x10) << 24)
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| ((uint64_t)sys_read8(addr + 0x14) << 16)
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| ((uint64_t)sys_read8(addr + 0x18) << 8)
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| (uint64_t)sys_read8(addr + 0x1c);
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#elif CONFIG_LITEX_CSR_DATA_WIDTH == 32
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return ((uint64_t)sys_read32(addr) << 32) | (uint64_t)sys_read32(addr + 0x4);
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#elif CONFIG_LITEX_CSR_DATA_WIDTH >= 64
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return sys_read64(addr);
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#else
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#error Unsupported CSR data width
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#endif
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}
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static inline void litex_write8(unsigned char value, unsigned long addr)
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{
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#if CONFIG_LITEX_CSR_DATA_WIDTH >= 8
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sys_write8(value, addr);
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#else
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#error CSR data width less than 8
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#endif
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}
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static inline void litex_write16(unsigned short value, unsigned long addr)
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{
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#if CONFIG_LITEX_CSR_DATA_WIDTH == 8
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sys_write8(value >> 8, addr);
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sys_write8(value, addr + 0x4);
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#elif CONFIG_LITEX_CSR_DATA_WIDTH >= 16
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sys_write16(value, addr);
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#else
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#error Unsupported CSR data width
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#endif
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}
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static inline void litex_write32(unsigned int value, unsigned long addr)
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{
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#if CONFIG_LITEX_CSR_DATA_WIDTH == 8
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sys_write8(value >> 24, addr);
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sys_write8(value >> 16, addr + 0x4);
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sys_write8(value >> 8, addr + 0x8);
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sys_write8(value, addr + 0xC);
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#elif CONFIG_LITEX_CSR_DATA_WIDTH >= 32
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sys_write32(value, addr);
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#else
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#error Unsupported CSR data width
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#endif
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}
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/*
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* Operates on uint32_t values only
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* Size is in bytes and meaningful are 1, 2 or 4
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* Address must be aligned to 4 bytes
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*/
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static inline void litex_write(uint32_t addr, uint32_t size, uint32_t value)
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{
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switch (size) {
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case 1:
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litex_write8(value, addr);
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break;
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case 2:
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litex_write16(value, addr);
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break;
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case 4:
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litex_write32(value, addr);
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break;
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default:
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break;
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}
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}
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/*
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* Operates on uint32_t values only
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* Size is in bytes and meaningful are 1, 2 or 4
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* Address must be aligned to 4 bytes
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*/
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static inline uint32_t litex_read(uint32_t addr, uint32_t size)
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{
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switch (size) {
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case 1:
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return litex_read8(addr);
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case 2:
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return litex_read16(addr);
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case 4:
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return litex_read32(addr);
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default:
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return 0;
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}
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}
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#endif /* _ASMLANGUAGE */
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#endif /* __RISCV32_LITEX_VEXRISCV_SOC_H_ */
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