dffcb1d6f9
Re-organize the SoC family/series/model configuration data so that: * Board definitions can distinguish between the single-core (XC7ZxxxS) and dual-core (XC7Zxxx) ARM Cortex-A9 models. Further descriptions of on-chip resources, in particular relating to the programmable logic capabilities if support of this functionality is to be implemented, can be added at a later time. * Separate SoC initialization code exists for the two series, so that the init code of the XC7Zxxx series can consider SMP while the init code of the single-core XC7ZxxxS series doesn't have to. * Device drivers which don't have to distinguish between the single- and double-core series of the SoC family can use a common configuration item whenever the pre-processor is used to enable Zynq-7000-specific code. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com> |
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| .. | ||
| arc | ||
| arm | ||
| arm64 | ||
| mips | ||
| nios2 | ||
| posix | ||
| riscv | ||
| sparc | ||
| x86 | ||
| xtensa | ||
| Kconfig | ||