zephyr/soc/xtensa
Andy Ross e42c5ca90a soc/intel_adsp: Suppress benign linker warnings out of objcopy
The fix_elf_addrs script runs objcopy over a binary that (due to some
legacy section definitions in a mildly complicated linker file) has a
few zero-length sections at address zero.  Objcopy considers this a
warning condition (though oddly the linker from the same version of
binutils which produced that binary does not!), which will be detected
as a CI failure.

Just eat the warnings.  Long term we should rework linkage to remove
the legacy stuff that is getting tripped over.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-12-10 06:49:27 -06:00
..
esp32 esp32: workaround esptool linker sections limit 2020-10-13 08:53:39 -07:00
intel_adsp soc/intel_adsp: Suppress benign linker warnings out of objcopy 2020-12-10 06:49:27 -06:00
intel_s1000 xtensa: intel_s1000: enable thread local storage 2020-10-24 10:52:00 -07:00
sample_controller arch: xtensa: replace DT_CPU_CLOCK_FREQUENCY with new dt macros 2020-04-22 11:38:33 -05:00
CMakeLists.txt soc/xtensa/intel_adsp: Upstream updates 2020-10-21 06:38:53 -04:00