208 lines
5.1 KiB
C
208 lines
5.1 KiB
C
/*
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* Copyright (c) 2016 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT arm_cmsdk_watchdog
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/**
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* @brief Driver for CMSDK APB Watchdog.
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*/
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#include <errno.h>
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#include <soc.h>
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#include <zephyr/drivers/watchdog.h>
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#include <zephyr/sys/printk.h>
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#include <zephyr/sys/reboot.h>
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struct wdog_cmsdk_apb {
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/* offset: 0x000 (r/w) watchdog load register */
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volatile uint32_t load;
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/* offset: 0x004 (r/ ) watchdog value register */
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volatile uint32_t value;
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/* offset: 0x008 (r/w) watchdog control register */
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volatile uint32_t ctrl;
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/* offset: 0x00c ( /w) watchdog clear interrupt register */
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volatile uint32_t intclr;
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/* offset: 0x010 (r/ ) watchdog raw interrupt status register */
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volatile uint32_t rawintstat;
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/* offset: 0x014 (r/ ) watchdog interrupt status register */
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volatile uint32_t maskintstat;
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volatile uint32_t reserved0[762];
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/* offset: 0xc00 (r/w) watchdog lock register */
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volatile uint32_t lock;
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volatile uint32_t reserved1[191];
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/* offset: 0xf00 (r/w) watchdog integration test control register */
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volatile uint32_t itcr;
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/* offset: 0xf04 ( /w) watchdog integration test output set register */
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volatile uint32_t itop;
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};
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#define CMSDK_APB_WDOG_LOAD (0xFFFFFFFF << 0)
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#define CMSDK_APB_WDOG_RELOAD (0xE4E1C00 << 0)
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#define CMSDK_APB_WDOG_VALUE (0xFFFFFFFF << 0)
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#define CMSDK_APB_WDOG_CTRL_RESEN (0x1 << 1)
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#define CMSDK_APB_WDOG_CTRL_INTEN (0x1 << 0)
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#define CMSDK_APB_WDOG_INTCLR (0x1 << 0)
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#define CMSDK_APB_WDOG_RAWINTSTAT (0x1 << 0)
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#define CMSDK_APB_WDOG_MASKINTSTAT (0x1 << 0)
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#define CMSDK_APB_WDOG_LOCK (0x1 << 0)
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#define CMSDK_APB_WDOG_INTEGTESTEN (0x1 << 0)
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#define CMSDK_APB_WDOG_INTEGTESTOUTSET (0x1 << 1)
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/*
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* Value written to the LOCK register to lock or unlock the write access
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* to all of the registers of the watchdog (except the LOCK register)
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*/
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#define CMSDK_APB_WDOG_UNLOCK_VALUE (0x1ACCE551)
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#define CMSDK_APB_WDOG_LOCK_VALUE (0x2BDDF662)
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#define WDOG_STRUCT \
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((volatile struct wdog_cmsdk_apb *)(DT_INST_REG_ADDR(0)))
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/* Keep reference of the device to pass it to the callback */
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const struct device *wdog_r;
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/* watchdog reload value in sec */
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static unsigned int reload_s = CMSDK_APB_WDOG_RELOAD;
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static uint8_t flags;
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static void (*user_cb)(const struct device *dev, int channel_id);
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static void wdog_cmsdk_apb_unlock(const struct device *dev)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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wdog->lock = CMSDK_APB_WDOG_UNLOCK_VALUE;
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}
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static int wdog_cmsdk_apb_setup(const struct device *dev, uint8_t options)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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ARG_UNUSED(options);
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/* Start the watchdog counter with INTEN bit */
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wdog->ctrl = (CMSDK_APB_WDOG_CTRL_RESEN | CMSDK_APB_WDOG_CTRL_INTEN);
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return 0;
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}
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static int wdog_cmsdk_apb_disable(const struct device *dev)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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/* Stop the watchdog counter with INTEN bit */
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wdog->ctrl = ~(CMSDK_APB_WDOG_CTRL_RESEN | CMSDK_APB_WDOG_CTRL_INTEN);
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return 0;
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}
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static int wdog_cmsdk_apb_install_timeout(const struct device *dev,
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const struct wdt_timeout_cfg *config)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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/* Reload value */
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reload_s = config->window.max *
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DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency);
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flags = config->flags;
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wdog->load = reload_s;
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/* Configure only the callback */
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user_cb = config->callback;
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return 0;
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}
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static int wdog_cmsdk_apb_feed(const struct device *dev, int channel_id)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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ARG_UNUSED(channel_id);
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/* Clear the interrupt */
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wdog->intclr = CMSDK_APB_WDOG_INTCLR;
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/* Reload */
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wdog->load = reload_s;
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return 0;
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}
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static const struct wdt_driver_api wdog_cmsdk_apb_api = {
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.setup = wdog_cmsdk_apb_setup,
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.disable = wdog_cmsdk_apb_disable,
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.install_timeout = wdog_cmsdk_apb_install_timeout,
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.feed = wdog_cmsdk_apb_feed,
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};
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#ifdef CONFIG_RUNTIME_NMI
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extern void z_NmiHandlerSet(void (*pHandler)(void));
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static int wdog_cmsdk_apb_has_fired(void)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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return (wdog->maskintstat & CMSDK_APB_WDOG_MASKINTSTAT) != 0U;
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}
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static void wdog_cmsdk_apb_isr(void)
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{
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/*
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* Check if the watchdog was the reason of the NMI interrupt
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* and if not, exit immediately
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*/
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if (!wdog_cmsdk_apb_has_fired()) {
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printk("NMI received! Rebooting...\n");
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/* In ARM implementation sys_reboot ignores the parameter */
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sys_reboot(0);
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} else {
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if (user_cb != NULL) {
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user_cb(wdog_r, 0);
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}
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}
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}
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#endif /* CONFIG_RUNTIME_NMI */
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static int wdog_cmsdk_apb_init(const struct device *dev)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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wdog_r = dev;
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/* unlock access to configuration registers */
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wdog_cmsdk_apb_unlock(dev);
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/* set default reload value */
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wdog->load = reload_s;
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#ifdef CONFIG_RUNTIME_NMI
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/* Configure the interrupts */
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z_NmiHandlerSet(wdog_cmsdk_apb_isr);
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#endif
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#ifdef CONFIG_WDOG_CMSDK_APB_START_AT_BOOT
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wdog_cmsdk_apb_setup(dev, 0);
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#endif
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return 0;
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}
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DEVICE_DT_INST_DEFINE(0,
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wdog_cmsdk_apb_init,
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NULL,
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NULL, NULL,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&wdog_cmsdk_apb_api);
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