32 lines
1.4 KiB
CMake
32 lines
1.4 KiB
CMake
#
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# Copyright 2024 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if(CONFIG_SOC_MCXN947_CPU0)
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board_runner_args(jlink "--device=MCXN947_M33_0" "--reset-after-load")
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board_runner_args(linkserver "--device=MCXN947:FRDM-MCXN947")
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board_runner_args(linkserver "--core=cm33_core0")
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board_runner_args(linkserver "--override=/device/memory/1/flash-driver=MCXN9xx_S.cfx")
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board_runner_args(linkserver "--override=/device/memory/1/location=0x10000000")
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# Linkserver v1.4.85 and earlier do not include the secure regions in the
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# MCXN947 memory map, so we add them here
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board_runner_args(linkserver "--override=/device/memory/-=\{\"location\":\"0x30000000\",\
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\"size\":\"0x00060000\",\"type\":\"RAM\"\}")
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board_runner_args(linkserver "--override=/device/memory/-=\{\"location\":\"0x30060000\",\
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\"size\":\"0x00008000\",\"type\":\"RAM\"\}")
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# Define region for peripherals
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board_runner_args(linkserver "--override=/device/memory/-=\{\"location\":\"0x50000000\",\
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\"size\":\"0x00140000\",\"type\":\"RAM\"\}")
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else()
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message(FATAL_ERROR "Support for cpu1 not available yet")
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endif()
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# Pyocd support added with the NXP.MCXN947_DFP.17.0.0.pack CMSIS Pack
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board_runner_args(pyocd "--target=mcxn947")
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include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
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