88 lines
3.2 KiB
C
88 lines
3.2 KiB
C
/*
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* Copyright (c) 2016, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL CORPORATION OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "qm_comparator.h"
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static void (*callback)(void *, uint32_t) = NULL;
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static void *callback_data;
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QM_ISR_DECLARE(qm_comparator_0_isr)
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{
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uint32_t int_status = QM_SCSS_CMP->cmp_stat_clr;
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#if (QUARK_D2000)
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/*
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* If the SoC is in deep sleep mode, all the clocks are gated, if the
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* interrupt source is cleared before the oscillators are ungated, the
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* oscillators return to a powered down state and the SoC will not
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* return to an active state then.
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*/
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if ((QM_SCSS_GP->gps1 & QM_SCSS_GP_POWER_STATES_MASK) ==
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QM_SCSS_GP_POWER_STATE_DEEP_SLEEP) {
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/* Return the oscillators to an active state. */
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QM_SCSS_CCU->osc0_cfg1 &= ~QM_OSC0_PD;
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QM_SCSS_CCU->osc1_cfg0 &= ~QM_OSC1_PD;
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/* HYB_OSC_PD_LATCH_EN = 1, RTC_OSC_PD_LATCH_EN=1 */
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QM_SCSS_CCU->ccu_lp_clk_ctl |=
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(QM_HYB_OSC_PD_LATCH_EN | QM_RTC_OSC_PD_LATCH_EN);
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}
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#endif
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if (callback) {
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(*callback)(callback_data, int_status);
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}
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/* Clear all pending interrupts */
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QM_SCSS_CMP->cmp_stat_clr = int_status;
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QM_ISR_EOI(QM_IRQ_COMPARATOR_0_INT_VECTOR);
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}
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int qm_ac_set_config(const qm_ac_config_t *const config)
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{
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QM_CHECK(config != NULL, -EINVAL);
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/* Avoid interrupts while configuring the comparators.
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* This can happen when the polarity is changed
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* compared to a previously configured interrupt. */
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QM_SCSS_CMP->cmp_en = 0;
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callback = config->callback;
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callback_data = config->callback_data;
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QM_SCSS_CMP->cmp_ref_sel = config->reference;
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QM_SCSS_CMP->cmp_ref_pol = config->polarity;
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QM_SCSS_CMP->cmp_pwr = config->power;
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/* Clear all pending interrupts before we enable */
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QM_SCSS_CMP->cmp_stat_clr = 0x7FFFF;
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QM_SCSS_CMP->cmp_en = config->int_en;
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return 0;
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}
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