34 lines
990 B
C
34 lines
990 B
C
/*
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* Copyright (c) 2020 Linaro Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/** @file
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* @brief Atmel SAM0 MCU family devicetree helper macros
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*/
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#ifndef _ATMEL_SAM0_DT_H_
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#define _ATMEL_SAM0_DT_H_
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/* Helper macro to get MCLK register address for corresponding
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* that has corresponding clock enable bit.
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*/
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#define MCLK_MASK_DT_INT_REG_ADDR(n) \
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(DT_REG_ADDR(DT_INST_PHANDLE_BY_NAME(n, clocks, mclk)) + \
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DT_INST_CLOCKS_CELL_BY_NAME(n, mclk, offset))
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/* Helper macros for use with ATMEL SAM0 DMAC controller
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* return 0xff as default value if there is no 'dmas' property
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*/
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#define ATMEL_SAM0_DT_INST_DMA_CELL(n, name, cell) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(n, dmas), \
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(DT_INST_DMAS_CELL_BY_NAME(n, name, cell)), \
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(0xff))
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#define ATMEL_SAM0_DT_INST_DMA_TRIGSRC(n, name) \
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ATMEL_SAM0_DT_INST_DMA_CELL(n, name, trigsrc)
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#define ATMEL_SAM0_DT_INST_DMA_CHANNEL(n, name) \
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ATMEL_SAM0_DT_INST_DMA_CELL(n, name, channel)
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#endif /* _ATMEL_SAM0_SOC_DT_H_ */
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