183 lines
3.5 KiB
Plaintext
183 lines
3.5 KiB
Plaintext
/*
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* Copyright (c) 2018, Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "skeleton.dtsi"
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#include <arc/emsk_dt.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "snps,arcem";
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reg = <1>;
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};
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intc: arcv2-intc {
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compatible = "snps,arcv2-intc";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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iccm0: iccm@0 {
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device_type = "memory";
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compatible = "arc,iccm";
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reg = <0x0 DT_ICCM_SIZE>;
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};
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dccm0: dccm@80000000 {
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device_type = "memory";
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compatible = "arc,dccm";
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reg = <0x80000000 DT_DCCM_SIZE>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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ddr0: memory@10000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x10000000 0x8000000>;
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};
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i2c0: i2c@f0004000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xf0004000 0x1000>;
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label = "I2C_0";
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interrupts = <DT_I2C0_INTNO 1>;
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interrupt-parent = <&intc>;
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};
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i2c1: i2c@f0005000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xf0005000 0x1000>;
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label = "I2C_1";
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interrupts = <DT_I2C1_INTNO 1>;
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interrupt-parent = <&intc>;
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};
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uart0: uart@f0008000 {
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compatible = "ns16550";
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clock-frequency = <DT_APB_CLK_HZ>;
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reg = <0xf0008000 0x1000>;
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label = "UART_0";
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interrupts = <DT_UART0_INTNO 1>;
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interrupt-parent = <&intc>;
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};
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uart1: uart@f0009000 {
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compatible = "ns16550";
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clock-frequency = <DT_APB_CLK_HZ>;
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reg = <0xf0009000 0x1000>;
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label = "UART_1";
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interrupts = <DT_UART1_INTNO 1>;
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interrupt-parent = <&intc>;
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};
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uart2: uart@f000a000 {
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compatible = "ns16550";
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clock-frequency = <DT_APB_CLK_HZ>;
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reg = <0xf000a000 0x1000>;
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label = "UART_2";
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interrupts = <DT_UART2_INTNO 1>;
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interrupt-parent = <&intc>;
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};
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gpio0: gpio@f0002000 {
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compatible = "snps,designware-gpio";
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reg = <0xF0002000 0xc>;
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bits = <32>;
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label = "GPIO_0";
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interrupts = <DT_GPIO0_INTNO 1>;
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interrupt-parent = <&intc>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio1: gpio@f000200C {
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compatible = "snps,designware-gpio";
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reg = <0xF000200C 0xc>;
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bits = <9>;
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label = "GPIO_1";
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interrupts = <DT_GPIO1_INTNO 1>;
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interrupt-parent = <&intc>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio2: gpio@f0002018 {
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compatible = "snps,designware-gpio";
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reg = <0xF0002018 0xc>;
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bits = <32>;
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label = "GPIO_2";
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interrupts = <DT_GPIO2_INTNO 1>;
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interrupt-parent = <&intc>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio3: gpio@f0002024 {
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compatible = "snps,designware-gpio";
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reg = <0xF0002024 0xc>;
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bits = <12>;
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label = "GPIO_3";
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interrupts = <DT_GPIO3_INTNO 1>;
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interrupt-parent = <&intc>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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spi0: spi@f0006000 {
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compatible = "snps,designware-spi";
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reg = <0xf0006000 0x1000>;
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label = "SPI_0";
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interrupts = <DT_SPI0_INTNO 1>;
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interrupt-parent = <&intc>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi1: spi@f0007000 {
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compatible = "snps,designware-spi";
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reg = <0xf0007000 0x1000>;
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label = "SPI_1";
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interrupts = <DT_SPI1_INTNO 1>;
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interrupt-parent = <&intc>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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