66 lines
2.8 KiB
ReStructuredText
66 lines
2.8 KiB
ReStructuredText
.. _mpu_stack_objects:
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MPU Stack Objects
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#################
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Thread Stack Creation
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*********************
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Thread stacks are declared statically with :c:macro:`K_THREAD_STACK_DEFINE()`
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or embedded within structures using c:macro:`K_THREAD_STACK_MEMBER()`
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For architectures which utilize memory protection unit (MPU) hardware,
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stacks are physically contiguous allocations. This contiguous allocation
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has implications for the placement of stacks in memory, as well as the
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implementation of other features such as stack protection and userspace. The
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implications for placement are directly attributed to the alignment
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requirements for MPU regions. This is discussed in the memory placement
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section below.
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Stack Guards
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************
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Stack protection mechanisms require hardware support that can restrict access
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to memory. Memory protection units can provide this kind of support.
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The MPU provides a fixed number of regions. Each region contains information
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about the start, end, size, and access attributes to be enforced on that
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particular region.
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Stack guards are implemented by using a single MPU region and setting the
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attributes for that region to not allow write access. If invalid accesses
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occur, a fault ensues. The stack guard is defined at the bottom (the lowest
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address) of the stack.
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Memory Placement
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****************
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During stack creation, a set of constraints are enforced on the allocation of
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memory. These constraints include determining the alignment of the stack and
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the correct sizing of the stack. During linking of the binary, these
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constraints are used to place the stacks properly.
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The main source of the memory constraints is the MPU design for the SoC. The
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MPU design may require specific constraints on the region definition. These
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can include alignment of beginning and end addresses, sizes of allocations,
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or even interactions between overlapping regions.
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Some MPUs require that each region be aligned to a power of two. These SoCs
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will have :option:`CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT` defined.
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This means that a 1500 byte stack should be aligned to a 2kB boundary and the
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stack size should also be adjusted to 2kB to ensure that nothing else is
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placed in the remainder of the region. SoCs which include the unmodified ARM
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v7m MPU will have these constraints.
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Some ARM MPUs use start and end addresses to define MPU regions and both the
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start and end addresses require 32 byte alignment. An example of this kind of
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MPU is found in the NXP FRDM K64F.
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MPUs may have a region priority mechanisms that use the highest priority region
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that covers the memory access to determine the enforcement policy. Others may
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logically OR regions to determine enforcement policy.
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Size and alignment constraints may result in stack allocations being larger
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than the requested size. Region priority mechanisms may result in
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some added complexity when implementing stack guards.
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