7db18ab721
According to the riscv's `arch.h`:
+------------+ <- thread.arch.priv_stack_start
| Guard | } Z_RISCV_STACK_GUARD_SIZE
+------------+
| Priv Stack | } CONFIG_PRIVILEGED_STACK_SIZE
+------------+ <- thread.arch.priv_stack_start +
CONFIG_PRIVILEGED_STACK_SIZE +
Z_RISCV_STACK_GUARD_SIZE
The start of the privilege stack should be:
`thread.arch.priv_stack_start + Z_RISCV_STACK_GUARD_SIZE`
Instead of
`thread.arch.priv_stack_start - CONFIG_PRIVILEGED_STACK_SIZE`
For the `end`, use the same equation of `top_of_priv_stack` in
the `arch_user_mode_enter()`
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
|
||
|---|---|---|
| .. | ||
| offsets | ||
| CMakeLists.txt | ||
| asm_macros.inc | ||
| coredump.c | ||
| cpu_idle.c | ||
| fatal.c | ||
| fpu.S | ||
| fpu.c | ||
| irq_manage.c | ||
| irq_offload.c | ||
| isr.S | ||
| pmp.S | ||
| pmp.c | ||
| prep_c.c | ||
| reboot.c | ||
| reset.S | ||
| semihost.c | ||
| smp.c | ||
| stacktrace.c | ||
| switch.S | ||
| thread.c | ||
| tls.c | ||
| userspace.S | ||
| vector_table.ld | ||