662 lines
18 KiB
C
662 lines
18 KiB
C
/*
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* Copyright (c) 2013-2015 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief ARM Cortex-M systick device driver
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*
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* This module implements the kernel's CORTEX-M ARM's systick device driver.
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* It provides the standard kernel "system clock driver" interfaces.
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*
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* The driver utilizes systick to provide kernel ticks.
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*
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* \INTERNAL IMPLEMENTATION DETAILS
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* The systick device provides a 24-bit clear-on-write, decrementing,
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* wrap-on-zero counter. Only edge sensitive triggered interrupt is supported.
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*
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* \INTERNAL PACKAGING DETAILS
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* The systick device driver is part of the microkernel in both a monolithic
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* kernel system and a split kernel system; it is not included in the
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* nanokernel portion of a split kernel.
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*
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* The device driver is also part of a nanokernel-only system, but omits more
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* complex capabilities (such as tickless idle support) that are only used in
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* conjunction with a microkernel.
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*/
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#include <nanokernel.h>
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#include <toolchain.h>
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#include <sections.h>
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#include <misc/__assert.h>
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#include <sys_clock.h>
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#include <drivers/system_timer.h>
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#ifdef CONFIG_MICROKERNEL
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#include <microkernel.h>
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extern struct nano_stack _k_command_stack;
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#endif /* CONFIG_MICROKERNEL */
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/* running total of timer count */
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static uint32_t clock_accumulated_count;
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/*
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* A board support package's board.h header must provide definitions for the
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* following constants:
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*
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* CONFIG_SYSTICK_CLOCK_FREQ
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*
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* This is the sysTick input clock frequency.
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*/
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#include <board.h>
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/*
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* When GDB_INFO is enabled, the handler installed in the vector table
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* (__systick), can be found in systick_gdb.s. In this case, the handler
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* in this file becomes _Systick() and will be called by __systick.
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*/
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#ifdef CONFIG_GDB_INFO
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#define _TIMER_INT_HANDLER _real_timer_int_handler
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#else
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#define _TIMER_INT_HANDLER _timer_int_handler
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#endif
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#ifdef CONFIG_TICKLESS_IDLE
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#define TIMER_MODE_PERIODIC 0 /* normal running mode */
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#define TIMER_MODE_ONE_SHOT 1 /* emulated, since sysTick has 1 mode */
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#define IDLE_NOT_TICKLESS 0 /* non-tickless idle mode */
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#define IDLE_TICKLESS 1 /* tickless idle mode */
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#endif /* CONFIG_TICKLESS_IDLE */
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#ifdef CONFIG_INT_LATENCY_BENCHMARK
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extern uint32_t _hw_irq_to_c_handler_latency;
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#endif
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#ifdef CONFIG_SYS_POWER_MANAGEMENT
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extern int32_t _NanoIdleValGet(void);
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extern void _NanoIdleValClear(void);
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extern void _sys_power_save_idle_exit(int32_t ticks);
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#endif
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#ifdef CONFIG_TICKLESS_IDLE
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extern int32_t _sys_idle_elapsed_ticks;
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#endif
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#ifdef CONFIG_TICKLESS_IDLE
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static uint32_t __noinit default_load_value; /* default count */
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static uint32_t idle_original_count;
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static uint32_t __noinit max_system_ticks;
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static uint32_t idle_original_ticks;
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static uint32_t __noinit max_load_value;
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static uint32_t __noinit timer_idle_skew;
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static unsigned char timer_mode = TIMER_MODE_PERIODIC;
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static unsigned char idle_mode = IDLE_NOT_TICKLESS;
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#endif /* CONFIG_TICKLESS_IDLE */
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#if defined(CONFIG_TICKLESS_IDLE) || \
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defined(CONFIG_SYSTEM_CLOCK_DISABLE)
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/**
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*
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* @brief Stop the timer
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*
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* This routine disables the systick counter.
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*
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* @return N/A
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*/
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static ALWAYS_INLINE void sysTickStop(void)
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{
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union __stcsr reg;
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/*
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* Disable the counter and its interrupt while preserving the
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* remaining bits.
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*/
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reg.val = __scs.systick.stcsr.val;
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reg.bit.enable = 0;
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reg.bit.tickint = 0;
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__scs.systick.stcsr.val = reg.val;
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}
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#endif /* CONFIG_TICKLESS_IDLE || CONFIG_SYSTEM_CLOCK_DISABLE */
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#ifdef CONFIG_TICKLESS_IDLE
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/**
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*
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* @brief Start the timer
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*
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* This routine enables the systick counter.
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*
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* @return N/A
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*/
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static ALWAYS_INLINE void sysTickStart(void)
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{
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union __stcsr reg;
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/*
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* Enable the counter, its interrupt and set the clock source to be
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* the system clock while preserving the remaining bits.
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*/
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reg.val =
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__scs.systick.stcsr.val; /* countflag is cleared by this read */
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reg.bit.enable = 1;
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reg.bit.tickint = 1;
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reg.bit.clksource = 1;
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__scs.systick.stcsr.val = reg.val;
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}
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/**
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*
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* @brief Get the current counter value
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*
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* This routine gets the value from the timer's current value register. This
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* value is the 'time' remaining to decrement before the timer triggers an
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* interrupt.
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*
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* @return the current counter value
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*/
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static ALWAYS_INLINE uint32_t sysTickCurrentGet(void)
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{
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return __scs.systick.stcvr;
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}
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/**
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*
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* @brief Get the reload/countdown value
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*
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* This routine returns the value from the reload value register.
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*
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* @return the counter's initial count/wraparound value
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*/
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static ALWAYS_INLINE uint32_t sysTickReloadGet(void)
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{
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return __scs.systick.strvr;
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}
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#endif /* CONFIG_TICKLESS_IDLE */
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/**
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*
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* @brief Set the reload/countdown value
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*
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* This routine sets value from which the timer will count down and also
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* sets the timer's current value register to zero.
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* Note that the value given is assumed to be valid (i.e., count < (1<<24)).
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*
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* @return N/A
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*/
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static ALWAYS_INLINE void sysTickReloadSet(
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uint32_t count /* count from which timer is to count down */
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)
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{
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/*
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* Write the reload value and clear the current value in preparation
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* for enabling the timer.
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* The countflag in the control/status register is also cleared by
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* this operation.
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*/
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__scs.systick.strvr = count;
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__scs.systick.stcvr = 0; /* also clears the countflag */
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}
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/**
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*
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* @brief System clock tick handler
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*
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* This routine handles the system clock tick interrupt. A TICK_EVENT event
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* is pushed onto the microkernel stack.
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*
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* The symbol for this routine is either _timer_int_handler (for normal
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* system operation) or _real_timer_int_handler (when GDB_INFO is enabled).
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*
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* @return N/A
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*/
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void _TIMER_INT_HANDLER(void *unused)
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{
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ARG_UNUSED(unused);
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#ifdef CONFIG_KERNEL_EVENT_LOGGER_INTERRUPT
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extern void _sys_k_event_logger_interrupt(void);
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_sys_k_event_logger_interrupt();
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#endif
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#ifdef CONFIG_INT_LATENCY_BENCHMARK
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uint32_t value = __scs.systick.val;
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uint32_t delta = __scs.systick.reload - value;
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if (_hw_irq_to_c_handler_latency > delta) {
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/* keep the lowest value observed */
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_hw_irq_to_c_handler_latency = delta;
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}
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#endif
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#ifdef CONFIG_SYS_POWER_MANAGEMENT
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int32_t numIdleTicks;
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/*
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* All interrupts are disabled when handling idle wakeup.
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* For tickless idle, this ensures that the calculation and programming
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* of
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* the device for the next timer deadline is not interrupted.
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* For non-tickless idle, this ensures that the clearing of the kernel
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* idle
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* state is not interrupted.
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* In each case, _sys_power_save_idle_exit is called with interrupts
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* disabled.
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*/
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__asm__(" cpsid i"); /* PRIMASK = 1 */
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#ifdef CONFIG_TICKLESS_IDLE
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/*
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* If this a wakeup from a completed tickless idle or after
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* _timer_idle_exit has processed a partial idle, return
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* to the normal tick cycle.
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*/
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if (timer_mode == TIMER_MODE_ONE_SHOT) {
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sysTickStop();
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sysTickReloadSet(default_load_value);
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sysTickStart();
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timer_mode = TIMER_MODE_PERIODIC;
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}
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/* set the number of elapsed ticks and announce them to the kernel */
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if (idle_mode == IDLE_TICKLESS) {
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/* tickless idle completed without interruption */
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idle_mode = IDLE_NOT_TICKLESS;
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_sys_idle_elapsed_ticks =
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idle_original_ticks + 1; /* actual # of idle ticks */
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_sys_clock_tick_announce();
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} else {
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/*
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* Increment the tick because _timer_idle_exit does not
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* account for the tick due to the timer interrupt itself.
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* Also, if not in tickless mode, _sys_idle_elapsed_ticks will be 0.
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*/
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_sys_idle_elapsed_ticks++;
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/*
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* If we transition from 0 elapsed ticks to 1 we need to
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* announce the
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* tick event to the microkernel. Other cases will be covered by
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* _timer_idle_exit.
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*/
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if (_sys_idle_elapsed_ticks == 1) {
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_sys_clock_tick_announce();
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}
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}
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/* accumulate total counter value */
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clock_accumulated_count += default_load_value * _sys_idle_elapsed_ticks;
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#else /* !CONFIG_TICKLESS_IDLE */
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/*
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* No tickless idle:
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* Update the total tick count and announce this tick to the kernel.
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*/
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clock_accumulated_count += sys_clock_hw_cycles_per_tick;
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_sys_clock_tick_announce();
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#endif /* CONFIG_TICKLESS_IDLE */
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numIdleTicks = _NanoIdleValGet(); /* get # of idle ticks requested */
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if (numIdleTicks) {
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_NanoIdleValClear(); /* clear kernel idle setting */
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/*
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* Complete idle processing.
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* Note that for tickless idle, nothing will be done in
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* _timer_idle_exit.
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*/
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_sys_power_save_idle_exit(numIdleTicks);
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}
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__asm__(" cpsie i"); /* re-enable interrupts (PRIMASK = 0) */
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#else /* !CONFIG_SYS_POWER_MANAGEMENT */
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/* accumulate total counter value */
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clock_accumulated_count += sys_clock_hw_cycles_per_tick;
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/*
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* one more tick has occurred -- don't need to do anything special since
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* timer is already configured to interrupt on the following tick
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*/
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_sys_clock_tick_announce();
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#endif /* CONFIG_SYS_POWER_MANAGEMENT */
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extern void _ExcExit(void);
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_ExcExit();
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}
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#ifdef CONFIG_TICKLESS_IDLE
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/**
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*
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* @brief Initialize the tickless idle feature
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*
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* This routine initializes the tickless idle feature by calculating the
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* necessary hardware-specific parameters.
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*
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* Note that the maximum number of ticks that can elapse during a "tickless idle"
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* is limited by <default_load_value>. The larger the value (the lower the
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* tick frequency), the fewer elapsed ticks during a "tickless idle".
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* Conversely, the smaller the value (the higher the tick frequency), the
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* more elapsed ticks during a "tickless idle".
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*
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* @return N/A
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*/
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static void sysTickTicklessIdleInit(void)
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{
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/* enable counter, disable interrupt and set clock src to system clock
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*/
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union __stcsr stcsr = {.bit = {1, 0, 1, 0, 0, 0} };
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volatile uint32_t dummy; /* used to help determine the 'skew time' */
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/* store the default reload value (which has already been set) */
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default_load_value = sysTickReloadGet();
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/* calculate the max number of ticks with this 24-bit H/W counter */
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max_system_ticks = 0x00ffffff / default_load_value;
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/* determine the associated load value */
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max_load_value = max_system_ticks * default_load_value;
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/*
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* Calculate the skew from switching the timer in and out of idle mode.
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* The following sequence is emulated:
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* 1. Stop the timer.
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* 2. Read the current counter value.
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* 3. Calculate the new/remaining counter reload value.
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* 4. Load the new counter value.
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* 5. Set the timer mode to periodic/one-shot.
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* 6. Start the timer.
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*
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* The timer must be running for this to work, so enable the
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* systick counter without generating interrupts, using the processor
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*clock.
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* Note that the reload value has already been set by the caller.
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*/
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__scs.systick.stcsr.val |= stcsr.val;
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__asm__(" isb"); /* ensure the timer is started before reading */
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timer_idle_skew = sysTickCurrentGet(); /* start of skew time */
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__scs.systick.stcsr.val |= stcsr.val; /* normally sysTickStop() */
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dummy = sysTickCurrentGet(); /* emulate sysTickReloadSet() */
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/* emulate calculation of the new counter reload value */
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if ((dummy == 1) || (dummy == default_load_value)) {
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dummy = max_system_ticks - 1;
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dummy += max_load_value - default_load_value;
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} else {
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dummy = dummy - 1;
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dummy += dummy * default_load_value;
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}
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/* _sysTickStart() without interrupts */
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__scs.systick.stcsr.val |= stcsr.val;
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timer_mode = TIMER_MODE_PERIODIC;
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/* skew time calculation for down counter (assumes no rollover) */
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timer_idle_skew -= sysTickCurrentGet();
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/* restore the previous sysTick state */
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sysTickStop();
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sysTickReloadSet(default_load_value);
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}
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/**
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*
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* @brief Place the system timer into idle state
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*
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* Re-program the timer to enter into the idle state for the given number of
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* ticks. It is set to a "one shot" mode where it will fire in the number of
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* ticks supplied or the maximum number of ticks that can be programmed into
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* hardware. A value of -1 will result in the maximum number of ticks.
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*
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* @return N/A
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*/
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void _timer_idle_enter(int32_t ticks /* system ticks */
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)
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{
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sysTickStop();
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/*
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* We're being asked to have the timer fire in "ticks" from now. To
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* maintain accuracy we must account for the remaining time left in the
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* timer. So we read the count out of it and add it to the requested
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* time out
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*/
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idle_original_count = sysTickCurrentGet() - timer_idle_skew;
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if ((ticks == -1) || (ticks > max_system_ticks)) {
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/*
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* We've been asked to fire the timer so far in the future that
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* the required count value would not fit in the 24-bit reload
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* register.
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* Instead, we program for the maximum programmable interval
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* minus one system tick to prevent overflow when the left over
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* count read earlier is added.
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*/
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idle_original_count += max_load_value - default_load_value;
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idle_original_ticks = max_system_ticks - 1;
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} else {
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/*
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* leave one tick of buffer to have to time react when coming
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* back
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*/
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idle_original_ticks = ticks - 1;
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idle_original_count += idle_original_ticks * default_load_value;
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}
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/*
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* Set timer to virtual "one shot" mode - sysTick does not have multiple
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* modes, so the reload value is simply changed.
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*/
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timer_mode = TIMER_MODE_ONE_SHOT;
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idle_mode = IDLE_TICKLESS;
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sysTickReloadSet(idle_original_count);
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sysTickStart();
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}
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/**
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*
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* @brief Handling of tickless idle when interrupted
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*
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* The routine, called by _sys_power_save_idle_exit, is responsible for taking
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* the timer out of idle mode and generating an interrupt at the next
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* tick interval. It is expected that interrupts have been disabled.
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*
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* Note that in this routine, _sys_idle_elapsed_ticks must be zero because the
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* ticker has done its work and consumed all the ticks. This has to be true
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* otherwise idle mode wouldn't have been entered in the first place.
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*
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* @return N/A
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*/
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void _timer_idle_exit(void)
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{
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uint32_t count; /* timer's current count register value */
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if (timer_mode == TIMER_MODE_PERIODIC) {
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/*
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* The timer interrupt handler is handling a completed tickless
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* idle
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* or this has been called by mistake; there's nothing to do
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* here.
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*/
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return;
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}
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sysTickStop();
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/* timer is in idle mode, adjust the ticks expired */
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count = sysTickCurrentGet();
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if ((count == 0) || (__scs.systick.stcsr.bit.countflag)) {
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/*
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* The timer expired and/or wrapped around. Re-set the timer to
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* its default value and mode.
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*/
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sysTickReloadSet(default_load_value);
|
|
timer_mode = TIMER_MODE_PERIODIC;
|
|
|
|
/*
|
|
* Announce elapsed ticks to the microkernel. Note we are
|
|
* guaranteed
|
|
* that the timer ISR will execute before the tick event is
|
|
* serviced,
|
|
* so _sys_idle_elapsed_ticks is adjusted to account for it.
|
|
*/
|
|
_sys_idle_elapsed_ticks = idle_original_ticks - 1;
|
|
_sys_clock_tick_announce();
|
|
} else {
|
|
uint32_t elapsed; /* elapsed "counter time" */
|
|
uint32_t remaining; /* remaining "counter time" */
|
|
|
|
elapsed = idle_original_count - count;
|
|
|
|
remaining = elapsed % default_load_value;
|
|
|
|
/* ensure that the timer will interrupt at the next tick */
|
|
|
|
if (remaining == 0) {
|
|
/*
|
|
* Idle was interrupted on a tick boundary. Re-set the
|
|
* timer to
|
|
* its default value and mode.
|
|
*/
|
|
sysTickReloadSet(default_load_value);
|
|
timer_mode = TIMER_MODE_PERIODIC;
|
|
} else if (count > remaining) {
|
|
/*
|
|
* There is less time remaining to the next tick
|
|
* boundary than
|
|
* time left for idle. Leave in "one shot" mode.
|
|
*/
|
|
sysTickReloadSet(remaining);
|
|
}
|
|
|
|
_sys_idle_elapsed_ticks = elapsed / default_load_value;
|
|
|
|
if (_sys_idle_elapsed_ticks) {
|
|
_sys_clock_tick_announce();
|
|
}
|
|
}
|
|
|
|
idle_mode = IDLE_NOT_TICKLESS;
|
|
sysTickStart();
|
|
}
|
|
|
|
#endif /* CONFIG_TICKLESS_IDLE */
|
|
|
|
/**
|
|
*
|
|
* @brief Initialize and enable the system clock
|
|
*
|
|
* This routine is used to program the systick to deliver interrupts at the
|
|
* rate specified via the 'sys_clock_us_per_tick' global variable.
|
|
*
|
|
* @return 0
|
|
*/
|
|
int _sys_clock_driver_init(struct device *device)
|
|
{
|
|
/* enable counter, interrupt and set clock src to system clock */
|
|
union __stcsr stcsr = {.bit = {1, 1, 1, 0, 0, 0} };
|
|
|
|
ARG_UNUSED(device);
|
|
|
|
/*
|
|
* Determine the reload value to achieve the configured tick rate.
|
|
*/
|
|
|
|
/* systick supports 24-bit H/W counter */
|
|
__ASSERT(sys_clock_hw_cycles_per_tick <= (1 << 24),
|
|
"sys_clock_hw_cycles_per_tick too large");
|
|
sysTickReloadSet(sys_clock_hw_cycles_per_tick - 1);
|
|
|
|
#ifdef CONFIG_TICKLESS_IDLE
|
|
|
|
/* calculate hardware-specific parameters for tickless idle */
|
|
|
|
sysTickTicklessIdleInit();
|
|
|
|
#endif /* CONFIG_TICKLESS_IDLE */
|
|
|
|
_ScbExcPrioSet(_EXC_SYSTICK, _EXC_IRQ_DEFAULT_PRIO);
|
|
|
|
__scs.systick.stcsr.val = stcsr.val;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
*
|
|
* @brief Read the platform's timer hardware
|
|
*
|
|
* This routine returns the current time in terms of timer hardware clock
|
|
* cycles.
|
|
*
|
|
* @return up counter of elapsed clock cycles
|
|
*
|
|
* \INTERNAL WARNING
|
|
* systick counter is a 24-bit down counter which is reset to "reload" value
|
|
* once it reaches 0.
|
|
*/
|
|
uint32_t sys_cycle_get_32(void)
|
|
{
|
|
return clock_accumulated_count + (__scs.systick.strvr - __scs.systick.stcvr);
|
|
}
|
|
|
|
#ifdef CONFIG_SYSTEM_CLOCK_DISABLE
|
|
|
|
/**
|
|
*
|
|
* @brief Stop announcing ticks into the kernel
|
|
*
|
|
* This routine disables the systick so that timer interrupts are no
|
|
* longer delivered.
|
|
*
|
|
* @return N/A
|
|
*/
|
|
void sys_clock_disable(void)
|
|
{
|
|
unsigned int key; /* interrupt lock level */
|
|
|
|
key = irq_lock();
|
|
|
|
/* disable the systick counter and systick interrupt */
|
|
|
|
sysTickStop();
|
|
|
|
irq_unlock(key);
|
|
}
|
|
|
|
#endif /* CONFIG_SYSTEM_CLOCK_DISABLE */
|