zephyr/soc
Erwan Gouriou 2805ea9193 drivers/clock_control: STM32H7 support
Provide basic clock control driver for STM32H7.
Bus clock activation is done through CM7 and CM4 common registers
so we don't have to care to the CPU Id before accessing.
Accesses are not protected for now. Only possible configuration
is system clock source set to HSE driven PLL.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
..
arc cleanup: include/: move misc/util.h to sys/util.h 2019-06-27 22:55:49 -04:00
arm drivers/clock_control: STM32H7 support 2019-07-04 08:50:04 -04:00
nios2 uart/ns16550, drivers/pcie: add PCI(e) support 2019-04-17 10:50:05 -07:00
posix docs: fix misspelling across the tree 2019-06-19 15:34:13 -05:00
riscv32 cleanup: include/: move misc/util.h to sys/util.h 2019-06-27 22:55:49 -04:00
x86 arch/x86: move arch/x86/include/mmustructs.h to ia32/mmustructs.h 2019-07-03 20:01:17 -04:00
x86_64/x86_64 x86_64: minimally preparing for enabling newlib 2019-06-27 16:08:32 -04:00
xtensa cleanup: include/: move misc/util.h to sys/util.h 2019-06-27 22:55:49 -04:00
Kconfig soc: Port usage of soc-*.ld to use Cmake 2019-05-20 22:28:28 -04:00