21 lines
476 B
Plaintext
21 lines
476 B
Plaintext
/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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* Copyright (c) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Copied from linker.ld */
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SECTION_DATA_PROLOGUE(.ramfunc,,)
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{
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MPU_ALIGN(__ramfunc_size);
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__ramfunc_start = .;
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*(.ramfunc)
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*(".ramfunc.*")
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MPU_ALIGN(__ramfunc_size);
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__ramfunc_end = .;
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__ramfunc_size = __ramfunc_end - __ramfunc_start;
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__ramfunc_load_start = LOADADDR(.ramfunc);
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