302 lines
6.8 KiB
C
302 lines
6.8 KiB
C
/*
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* Copyright (c) 2021 Marc Reilly - Creative Product Design
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT zephyr_spi_bitbang
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#define LOG_LEVEL CONFIG_SPI_LOG_LEVEL
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(spi_bitbang);
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#include <zephyr/sys/sys_io.h>
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#include <zephyr/drivers/spi.h>
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#include "spi_context.h"
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struct spi_bitbang_data {
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struct spi_context ctx;
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int bits;
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int wait_us;
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int dfs;
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};
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struct spi_bitbang_config {
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struct gpio_dt_spec clk_gpio;
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struct gpio_dt_spec mosi_gpio;
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struct gpio_dt_spec miso_gpio;
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};
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static inline bool spi_bitbang_has_miso(const struct device *dev)
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{
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const struct spi_bitbang_config *info = dev->config;
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return info->miso_gpio.port != NULL;
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}
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static inline bool spi_bitbang_has_mosi(const struct device *dev)
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{
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const struct spi_bitbang_config *info = dev->config;
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return info->mosi_gpio.port != NULL;
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}
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static int spi_bitbang_configure(const struct spi_bitbang_config *info,
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struct spi_bitbang_data *data,
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const struct spi_config *config)
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{
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if (config->operation & SPI_OP_MODE_SLAVE) {
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LOG_ERR("Slave mode not supported");
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return -ENOTSUP;
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}
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if (config->operation & (SPI_TRANSFER_LSB | SPI_LINES_DUAL
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| SPI_LINES_QUAD)) {
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LOG_ERR("Unsupported configuration");
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return -ENOTSUP;
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}
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const int bits = SPI_WORD_SIZE_GET(config->operation);
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if (bits > 16) {
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LOG_ERR("Word sizes > 16 bits not supported");
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return -ENOTSUP;
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}
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data->bits = bits;
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data->dfs = ((data->bits - 1) / 8) + 1;
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if (config->frequency > 0) {
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/* convert freq to period, the extra /2 is due to waiting
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* twice in each clock cycle. The '2000' is an upscale factor.
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*/
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data->wait_us = (1000000ul * 2000ul / config->frequency) / 2000ul;
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data->wait_us /= 2;
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} else {
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data->wait_us = 8 / 2; /* 125 kHz */
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}
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data->ctx.config = config;
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spi_context_cs_configure_all(&data->ctx);
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return 0;
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}
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static int spi_bitbang_transceive(const struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs)
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{
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const struct spi_bitbang_config *info = dev->config;
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struct spi_bitbang_data *data = dev->data;
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struct spi_context *ctx = &data->ctx;
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spi_bitbang_configure(info, data, spi_cfg);
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spi_context_buffers_setup(ctx, tx_bufs, rx_bufs, data->dfs);
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int clock_state = 0;
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int cpha = 0;
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bool loop = false;
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if (SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPOL) {
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clock_state = 1;
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}
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if (SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPHA) {
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cpha = 1;
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}
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if (SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_LOOP) {
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loop = true;
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}
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/* set the initial clock state before CS */
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gpio_pin_set_dt(&info->clk_gpio, clock_state);
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spi_context_cs_control(ctx, true);
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const uint32_t wait_us = data->wait_us;
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const bool has_miso = spi_bitbang_has_miso(dev);
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const bool has_mosi = spi_bitbang_has_mosi(dev);
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while (spi_context_tx_buf_on(ctx) || spi_context_rx_buf_on(ctx)) {
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uint16_t w = 0;
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if (ctx->tx_len) {
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switch (data->dfs) {
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case 2:
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w = *(uint16_t *)(ctx->tx_buf);
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break;
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case 1:
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w = *(uint8_t *)(ctx->tx_buf);
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break;
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}
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}
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int shift = data->bits - 1;
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uint16_t r = 0;
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int b = 0;
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bool do_read = false;
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if (has_miso && spi_context_rx_buf_on(ctx)) {
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do_read = true;
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}
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while (shift >= 0) {
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const int d = (w >> shift) & 0x1;
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b = 0;
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/* setup data out first thing */
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if (has_mosi) {
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gpio_pin_set_dt(&info->mosi_gpio, d);
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}
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k_busy_wait(wait_us);
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/* first clock edge */
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gpio_pin_set_dt(&info->clk_gpio, !clock_state);
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if (!loop && do_read && !cpha) {
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b = gpio_pin_get_dt(&info->miso_gpio);
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}
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k_busy_wait(wait_us);
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/* second clock edge */
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gpio_pin_set_dt(&info->clk_gpio, clock_state);
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if (!loop && do_read && cpha) {
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b = gpio_pin_get_dt(&info->miso_gpio);
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}
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if (loop) {
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b = d;
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}
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r = (r << 1) | (b ? 0x1 : 0x0);
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--shift;
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}
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if (spi_context_rx_buf_on(ctx)) {
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switch (data->dfs) {
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case 2:
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*(uint16_t *)(ctx->rx_buf) = r;
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break;
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case 1:
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*(uint8_t *)(ctx->rx_buf) = r;
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break;
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}
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}
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LOG_DBG(" w: %04x, r: %04x , do_read: %d", w, r, do_read);
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spi_context_update_tx(ctx, data->dfs, 1);
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spi_context_update_rx(ctx, data->dfs, 1);
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}
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spi_context_cs_control(ctx, false);
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spi_context_complete(ctx, 0);
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return 0;
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}
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#ifdef CONFIG_SPI_ASYNC
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static int spi_bitbang_transceive_async(const struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs,
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struct k_poll_signal *async)
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{
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return -ENOTSUP;
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}
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#endif
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int spi_bitbang_release(const struct device *dev,
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const struct spi_config *config)
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{
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struct spi_bitbang_data *data = dev->data;
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struct spi_context *ctx = &data->ctx;
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spi_context_unlock_unconditionally(ctx);
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return 0;
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}
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static struct spi_driver_api spi_bitbang_api = {
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.transceive = spi_bitbang_transceive,
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.release = spi_bitbang_release,
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#ifdef CONFIG_SPI_ASYNC
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.transceive_async = spi_bitbang_transceive_async,
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#endif /* CONFIG_SPI_ASYNC */
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};
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int spi_bitbang_init(const struct device *dev)
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{
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const struct spi_bitbang_config *config = dev->config;
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int rc;
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if (!device_is_ready(config->clk_gpio.port)) {
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LOG_ERR("GPIO port for clk pin is not ready");
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return -ENODEV;
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}
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rc = gpio_pin_configure_dt(&config->clk_gpio, GPIO_OUTPUT_INACTIVE);
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if (rc < 0) {
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LOG_ERR("Couldn't configure clk pin; (%d)", rc);
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return rc;
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}
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if (config->mosi_gpio.port != NULL) {
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if (!device_is_ready(config->mosi_gpio.port)) {
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LOG_ERR("GPIO port for mosi pin is not ready");
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return -ENODEV;
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}
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rc = gpio_pin_configure_dt(&config->mosi_gpio,
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GPIO_OUTPUT_INACTIVE);
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if (rc < 0) {
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LOG_ERR("Couldn't configure mosi pin; (%d)", rc);
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return rc;
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}
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}
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if (config->miso_gpio.port != NULL) {
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if (!device_is_ready(config->miso_gpio.port)) {
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LOG_ERR("GPIO port for miso pin is not ready");
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return -ENODEV;
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}
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rc = gpio_pin_configure_dt(&config->miso_gpio, GPIO_INPUT);
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if (rc < 0) {
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LOG_ERR("Couldn't configure miso pin; (%d)", rc);
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return rc;
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}
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}
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return 0;
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}
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#define SPI_BITBANG_INIT(inst) \
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static struct spi_bitbang_config spi_bitbang_config_##inst = { \
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.clk_gpio = GPIO_DT_SPEC_INST_GET(inst, clk_gpios), \
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.mosi_gpio = GPIO_DT_SPEC_INST_GET_OR(inst, mosi_gpios, {0}), \
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.miso_gpio = GPIO_DT_SPEC_INST_GET_OR(inst, miso_gpios, {0}), \
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}; \
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\
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static struct spi_bitbang_data spi_bitbang_data_##inst = { \
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SPI_CONTEXT_INIT_LOCK(spi_bitbang_data_##inst, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_bitbang_data_##inst, ctx), \
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}; \
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\
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DEVICE_DT_INST_DEFINE(inst, \
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spi_bitbang_init, \
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NULL, \
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&spi_bitbang_data_##inst, \
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&spi_bitbang_config_##inst, \
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POST_KERNEL, \
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CONFIG_SPI_INIT_PRIORITY, \
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&spi_bitbang_api);
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DT_INST_FOREACH_STATUS_OKAY(SPI_BITBANG_INIT)
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