279 lines
6.4 KiB
C
279 lines
6.4 KiB
C
/*
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* Copyright (c) 2019 Alexander Wachter
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/can.h>
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#include <zephyr/kernel.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(can_common, CONFIG_CAN_LOG_LEVEL);
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/* Maximum acceptable deviation in sample point location (permille) */
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#define SAMPLE_POINT_MARGIN 50
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/* CAN sync segment is always one time quantum */
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#define CAN_SYNC_SEG 1
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static void can_msgq_put(const struct device *dev, struct zcan_frame *frame, void *user_data)
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{
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struct k_msgq *msgq = (struct k_msgq *)user_data;
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int ret;
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ARG_UNUSED(dev);
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__ASSERT_NO_MSG(msgq);
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ret = k_msgq_put(msgq, frame, K_NO_WAIT);
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if (ret) {
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LOG_ERR("Msgq %p overflowed. Frame ID: 0x%x", msgq, frame->id);
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}
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}
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int z_impl_can_add_rx_filter_msgq(const struct device *dev, struct k_msgq *msgq,
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const struct zcan_filter *filter)
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{
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const struct can_driver_api *api = dev->api;
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return api->add_rx_filter(dev, can_msgq_put, msgq, filter);
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}
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static int update_sampling_pnt(uint32_t ts, uint32_t sp, struct can_timing *res,
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const struct can_timing *max,
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const struct can_timing *min)
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{
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uint16_t ts1_max = max->phase_seg1 + max->prop_seg;
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uint16_t ts1_min = min->phase_seg1 + min->prop_seg;
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uint32_t sp_calc;
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uint16_t ts1, ts2;
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ts2 = ts - (ts * sp) / 1000;
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ts2 = CLAMP(ts2, min->phase_seg2, max->phase_seg2);
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ts1 = ts - CAN_SYNC_SEG - ts2;
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if (ts1 > ts1_max) {
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ts1 = ts1_max;
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ts2 = ts - CAN_SYNC_SEG - ts1;
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if (ts2 > max->phase_seg2) {
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return -1;
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}
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} else if (ts1 < ts1_min) {
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ts1 = ts1_min;
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ts2 = ts - ts1;
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if (ts2 < min->phase_seg2) {
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return -1;
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}
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}
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res->prop_seg = CLAMP(ts1 / 2, min->prop_seg, max->prop_seg);
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res->phase_seg1 = ts1 - res->prop_seg;
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res->phase_seg2 = ts2;
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sp_calc = (CAN_SYNC_SEG + ts1) * 1000 / ts;
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return sp_calc > sp ? sp_calc - sp : sp - sp_calc;
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}
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/* Internal function to do the actual calculation */
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static int can_calc_timing_int(uint32_t core_clock, struct can_timing *res,
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const struct can_timing *min,
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const struct can_timing *max,
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uint32_t bitrate, uint16_t sp)
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{
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uint32_t ts = max->prop_seg + max->phase_seg1 + max->phase_seg2 +
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CAN_SYNC_SEG;
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uint16_t sp_err_min = UINT16_MAX;
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int sp_err;
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struct can_timing tmp_res;
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if (bitrate == 0 || sp >= 1000 ||
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(!IS_ENABLED(CONFIG_CAN_FD_MODE) && bitrate > 1000000) ||
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(IS_ENABLED(CONFIG_CAN_FD_MODE) && bitrate > 8000000)) {
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return -EINVAL;
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}
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for (int prescaler = MAX(core_clock / (ts * bitrate), 1);
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prescaler <= max->prescaler; ++prescaler) {
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if (core_clock % (prescaler * bitrate)) {
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/* No integer ts */
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continue;
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}
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ts = core_clock / (prescaler * bitrate);
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sp_err = update_sampling_pnt(ts, sp, &tmp_res,
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max, min);
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if (sp_err < 0) {
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/* No prop_seg, seg1, seg2 combination possible */
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continue;
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}
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if (sp_err < sp_err_min) {
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sp_err_min = sp_err;
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res->prop_seg = tmp_res.prop_seg;
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res->phase_seg1 = tmp_res.phase_seg1;
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res->phase_seg2 = tmp_res.phase_seg2;
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res->prescaler = (uint16_t)prescaler;
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if (sp_err == 0) {
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/* No better result than a perfect match*/
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break;
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}
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}
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}
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if (sp_err_min) {
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LOG_DBG("SP error: %d 1/1000", sp_err_min);
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}
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return sp_err_min == UINT16_MAX ? -EINVAL : (int)sp_err_min;
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}
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int z_impl_can_calc_timing(const struct device *dev, struct can_timing *res,
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uint32_t bitrate, uint16_t sample_pnt)
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{
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const struct can_timing *min = can_get_timing_min(dev);
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const struct can_timing *max = can_get_timing_max(dev);
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uint32_t core_clock;
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int ret;
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ret = can_get_core_clock(dev, &core_clock);
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if (ret != 0) {
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return ret;
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}
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return can_calc_timing_int(core_clock, res, min, max, bitrate, sample_pnt);
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}
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#ifdef CONFIG_CAN_FD_MODE
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int z_impl_can_calc_timing_data(const struct device *dev, struct can_timing *res,
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uint32_t bitrate, uint16_t sample_pnt)
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{
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const struct can_timing *min = can_get_timing_data_min(dev);
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const struct can_timing *max = can_get_timing_data_max(dev);
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uint32_t core_clock;
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int ret;
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ret = can_get_core_clock(dev, &core_clock);
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if (ret != 0) {
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return ret;
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}
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return can_calc_timing_int(core_clock, res, min, max, bitrate, sample_pnt);
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}
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#endif /* CONFIG_CAN_FD_MODE */
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int can_calc_prescaler(const struct device *dev, struct can_timing *timing,
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uint32_t bitrate)
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{
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uint32_t ts = timing->prop_seg + timing->phase_seg1 + timing->phase_seg2 +
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CAN_SYNC_SEG;
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uint32_t core_clock;
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int ret;
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ret = can_get_core_clock(dev, &core_clock);
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if (ret != 0) {
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return ret;
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}
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timing->prescaler = core_clock / (bitrate * ts);
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return core_clock % (ts * timing->prescaler);
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}
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/**
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* @brief Get the sample point location for a given bitrate
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*
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* @param bitrate The bitrate in bits/second.
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* @return The sample point in permille.
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*/
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uint16_t sample_point_for_bitrate(uint32_t bitrate)
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{
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uint16_t sample_pnt;
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if (bitrate > 800000) {
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/* 75.0% */
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sample_pnt = 750;
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} else if (bitrate > 500000) {
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/* 80.0% */
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sample_pnt = 800;
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} else {
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/* 87.5% */
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sample_pnt = 875;
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}
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return sample_pnt;
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}
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int z_impl_can_set_bitrate(const struct device *dev, uint32_t bitrate)
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{
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struct can_timing timing;
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uint32_t max_bitrate;
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uint16_t sample_pnt;
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int ret;
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ret = can_get_max_bitrate(dev, &max_bitrate);
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if (ret == -ENOSYS) {
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/* Maximum bitrate unknown */
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max_bitrate = 0;
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} else if (ret < 0) {
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return ret;
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}
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if ((max_bitrate > 0) && (bitrate > max_bitrate)) {
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return -ENOTSUP;
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}
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sample_pnt = sample_point_for_bitrate(bitrate);
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ret = can_calc_timing(dev, &timing, bitrate, sample_pnt);
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if (ret < 0) {
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return -EINVAL;
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}
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if (ret > SAMPLE_POINT_MARGIN) {
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return -EINVAL;
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}
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timing.sjw = CAN_SJW_NO_CHANGE;
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return can_set_timing(dev, &timing);
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}
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#ifdef CONFIG_CAN_FD_MODE
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int z_impl_can_set_bitrate_data(const struct device *dev, uint32_t bitrate_data)
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{
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struct can_timing timing_data;
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uint32_t max_bitrate;
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uint16_t sample_pnt;
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int ret;
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ret = can_get_max_bitrate(dev, &max_bitrate);
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if (ret == -ENOSYS) {
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/* Maximum bitrate unknown */
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max_bitrate = 0;
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} else if (ret < 0) {
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return ret;
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}
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if ((max_bitrate > 0) && (bitrate_data > max_bitrate)) {
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return -ENOTSUP;
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}
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sample_pnt = sample_point_for_bitrate(bitrate_data);
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ret = can_calc_timing_data(dev, &timing_data, bitrate_data, sample_pnt);
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if (ret < 0) {
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return -EINVAL;
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}
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if (ret > SAMPLE_POINT_MARGIN) {
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return -EINVAL;
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}
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timing_data.sjw = CAN_SJW_NO_CHANGE;
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return can_set_timing_data(dev, &timing_data);
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}
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#endif /* CONFIG_CAN_FD_MODE */
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