66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/*
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* Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_RISCV32_RISCV_PRIVILEGE_ASM_INLINE_GCC_H_
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#define ZEPHYR_INCLUDE_ARCH_RISCV32_RISCV_PRIVILEGE_ASM_INLINE_GCC_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* The file must not be included directly
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* Include arch/cpu.h instead
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* TEMPORARY
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*/
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#ifndef _ASMLANGUAGE
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#include <toolchain.h>
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/**
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*
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* @brief find least significant bit set in a 32-bit word
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*
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* This routine finds the first bit set starting from the least significant bit
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* in the argument passed in and returns the index of that bit. Bits are
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* numbered starting at 1 from the least significant bit. A return value of
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* zero indicates that the value passed is zero.
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*
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* @return least significant bit set, 0 if @a op is 0
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*/
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static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
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{
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return __builtin_ffs(op);
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}
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/**
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*
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* @brief find most significant bit set in a 32-bit word
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*
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* This routine finds the first bit set starting from the most significant bit
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* in the argument passed in and returns the index of that bit. Bits are
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* numbered starting at 1 from the least significant bit. A return value of
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* zero indicates that the value passed is zero.
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*
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* @return most significant bit set, 0 if @a op is 0
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*/
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static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
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{
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if (!op)
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return 0;
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return 32 - __builtin_clz(op);
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}
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_RISCV32_RISCV_PRIVILEGE_ASM_INLINE_GCC_H_ */
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