zephyr/soc/riscv/esp32c3/Kconfig.defconfig

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# ESP32C3 board configuration
# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
if SOC_ESP32C3
if BOOTLOADER_MCUBOOT
config HAS_FLASH_LOAD_OFFSET
default y
config MCUBOOT_GENERATE_UNSIGNED_IMAGE
default y
config MCUBOOT_GENERATE_CONFIRMED_IMAGE
default y
config ROM_START_OFFSET
default 0x20
endif
config SOC
default "esp32c3"
config NUM_IRQS
default 62
config GEN_ISR_TABLES
default y
config GEN_SW_ISR_TABLE
default y
config GEN_IRQ_VECTOR_TABLE
default n
config DYNAMIC_INTERRUPTS
default y
config ISR_STACK_SIZE
default 2048
config ATOMIC_OPERATIONS_C
default y
config MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE
default n
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 16000000
endif