zephyr/dts/bindings/pinctrl/ti,k3-pinctrl.yaml

40 lines
1013 B
YAML

# Copyright (c) 2023 Enphase Energy
# SPDX-License-Identifier: Apache-2.0
description: |
TI K3 pinctrl node.
Pins can be configured using the following macro "K3_PINMUX(offset, value, mux_mode)".
offset - the pin attribute register offset from the base address.
value - one of the following:
PIN_OUTPUT
PIN_OUTPUT_PULLUP
PIN_OUTPUT_PULLDOWN
PIN_INPUT
PIN_INPUT_PULLUP
PIN_INPUT_PULLDOWN
mux_mode - The mux mode for the pin, MUX_MODE_0 -> MUX_MODE_9.
e.g. for AM62x the pinctrl base address is 0xf4000.
The default UART0_RX pin is located at 0x000f41c8 (mux mode 0).
So the configuration would be "K3_PINMUX(0x1c8, PIN_INPUT, MUX_MODE_0)".
compatible: "ti,k3-pinctrl"
include: base.yaml
properties:
reg:
required: true
child-binding:
description: |
This binding gives a base representation of the TI K3
pin configuration.
properties:
pinmux:
required: true
type: array
description: |
TI K3 pin configuration.