152 lines
5.0 KiB
YAML
152 lines
5.0 KiB
YAML
# Copyright (c) 2022 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: |
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The node has the 'pinctrl' node label set in MCUX RT SoC's devicetree. These
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nodes can be autogenerated using the MCUXpresso config tools combined with
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the rt_dts_gen.py script in NXP's HAL. The mux, mode, input, daisy, and cfg
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fields in a group select the pins to be configured, and the remaining
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devicetree properties set configuration values for those pins
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for example, here is an group configuring LPUART1 pins:
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group0 {
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pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx,
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&iomuxc_gpio_ad_b0_13_lpuart1_rx>;
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drive-strength = "r0-6";
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slew-rate = "slow";
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nxp,speed = "100-mhz";
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};
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This will select GPIO_AD_B0_12 as LPUART1 TX, and GPIO_AD_B0_13 as LPUART1 RX.
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Both pins will be configured with a weak latch, drive strength of "r0-6",
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slow slew rate, and 100 MHZ speed.
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Note that the soc level iomuxc dts file can be examined to find the possible
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pinmux options. Here are the affects of each property on the
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IOMUXC SW_PAD_CTL register:
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input-schmitt-enable: HYS=1
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drive-open-drain: ODE=1
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input-enable: SION=1 (in SW_MUX_CTL_PAD register)
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bias-pull-down: PUE=1, PUS=<bias-pull-down-value>
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bias-pull-up: PUE=1, PUS=<bias-pull-up-value>
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bias-disable: PKE=0
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slew-rate: SRE=<enum_idx>
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drive-strength: DSE=<enum_idx>
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nxp,speed: SPEED=<enum_idx>
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If only required properties are supplied, the pin will have the following
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configuration:
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HYS=0,
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ODE=0,
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SION=0,
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PUE=0,
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PUS=0,
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PKE=1,
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SRE=<slew-rate>,
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DSE=<drive-strength>,
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SPEED=<nxp,speed>
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compatible: "nxp,mcux-rt-pinctrl"
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include: base.yaml
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child-binding:
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description: MCUX RT pin controller pin group
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child-binding:
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description: |
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MCUX RT pin controller pin configuration node.
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- input-schmitt-enable
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- drive-open-drain
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- input-enable
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- bias-disable
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- bias-pull-down
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- bias-pull-up
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properties:
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pinmux:
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required: true
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type: phandles
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description: |
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Pin mux selections for this group. See the soc level iomuxc DTSI file
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for a defined list of these options.
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drive-strength:
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required: true
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type: string
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enum:
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- "disabled"
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- "r0"
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- "r0-2"
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- "r0-3"
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- "r0-4"
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- "r0-5"
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- "r0-6"
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- "r0-7"
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description: |
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Pin output drive strength. Sets the DSE field in the IOMUXC peripheral.
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the drive strength is expressed as a output impedance at a given voltage,
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but maximum current values can be calculated from these impedances
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for a specific load impedance.
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000 DSE_0_output_driver_disabled_ — output driver disabled
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001 DSE_1_R0_1 — 157 Ohm impedance @3.3V, 260 Ohm impedance @1.8V
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010 DSE_2_R0_2 — 78 Ohm @3.3V, 130 Ohm @1.8V
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011 DSE_3_R0_3 — 53 Ohm @3.3V, 88 Ohm @1.8V
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100 DSE_4_R0_4 — 39 Ohm @3.3V, 65 Ohm @1.8V
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101 DSE_5_R0_5 — 32 Ohm @3.3V, 52 Ohm @1.8V
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110 DSE_6_R0_6 — 32 Ohm @3.3V, 43 Ohm @1.8V
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111 DSE_7_R0_7 — 26 Ohm @3.3V, 37 Ohm @1.8V
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bias-pull-up-value:
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type: string
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default: "47k"
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enum:
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- "unused"
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- "47k"
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- "100k"
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- "22k"
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description: |
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Select the value of the pull up resistor present on this pin
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Corresponds to the PUS field in the IOMUXC peripheral.
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47k resistor selected as default due to this being the default pullup
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value on most SOC pins
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00 Unused- no change will be applied to pin
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01 PUS_1_47K_Ohm_Pull_Up — 47K Ohm Pull Up
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10 PUS_2_100K_Ohm_Pull_Up — 100K Ohm Pull Up
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11 PUS_2_22K_Ohm_Pull_Up — 22K Ohm Pull Up
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bias-pull-down-value:
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type: string
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default: "100k"
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enum:
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- "100k"
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description: |
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Select the value of the pull up resistor present on this pin
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Corresponds to the PUS field in the IOMUXC peripheral. 100k is
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currently the only supported pull down resistance.
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00 PUS_0_100K_Ohm_Pull_Down - 100K Ohm Pull Down
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slew-rate:
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required: true
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type: string
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enum:
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- "slow"
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- "fast"
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description: |
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Select slew rate for pin. Corresponds to SRE field in IOMUXC peripheral
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0 SRE_0_Slow_Slew_Rate — Slow Slew Rate
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1 SRE_1_Fast_Slew_Rate — Fast Slew Rate
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nxp,speed:
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type: string
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enum:
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- "50-mhz"
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- "100-mhz"
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- "150-mhz"
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- "200-mhz"
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description: |
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Sets pin speed. Corresponds to SPEED field in IOMUXC peripheral
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00 SPEED_0_low_50MHz_ — low(50MHz)
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01 SPEED_1_medium_100MHz_ — medium(100MHz)
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10 SPEED_2_medium_150MHz_ — medium(150MHz)
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11 SPEED_3_max_200MHz_ — max(200MHz)
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