89 lines
2.7 KiB
YAML
89 lines
2.7 KiB
YAML
# Copyright (c) Nuvoton Technology Corp. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Pin controller is responsible for controlling pin function
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selection and pin properties. For example, for example you can
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use this node to set UART0 RX as pin PB12 to fulfill SYS_GPB_MFP3_PB12MFP_UART0_RXD.
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The node has the 'pinctrl' node label set in your SoC's devicetree,
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so you can modify it like this:
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&pinctrl {
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/* your modifications go here */
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};
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All device pin configurations should be placed in child nodes of the
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'pinctrl' node, as shown in this example:
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&pinctrl {
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/* configuration for the uart0 "default" state */
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uart0_default: uart0_default {
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/* configure PB13 as UART0 TX and PB12 as UART0 RX */
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group0 {
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pinmux = <PB12MFP_UART0_RXD>, <PB13MFP_UART0_TXD>;
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};
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};
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};
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To link pin configurations with a device, use a pinctrl-N property for some
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number N, like this example you could place in your board's DTS file:
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#include "board-pinctrl.dtsi"
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&uart0 {
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pinctrl-0 = <&uart0_default>;
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pinctrl-names = "default";
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};
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compatible: "nuvoton,numaker-pinctrl"
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include: base.yaml
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properties:
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reg:
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required: true
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child-binding:
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description: NuMaker pin controller pin group
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child-binding:
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description: |
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Each child node defines the configuration for a particular state.
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- drive-open-drain
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- input-schmitt-enable
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properties:
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pinmux:
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required: true
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type: array
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description: |
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An array of pins sharing the same group properties. The pins should
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be defined using pre-defined macros or, alternatively, using NVT_PINMUX
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macros depending on the pinmux model used by the SoC series.
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drive-strength:
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type: string
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default: "low"
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enum:
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- "low"
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- "fast"
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description: |
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Set the driving strength of a pin. Hardware default configuration is low and
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it's enough to drive most components, like as LED, CAN transceiver and so on.
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slew-rate:
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type: string
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default: "low"
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enum:
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- "low"
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- "high"
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- "fast"
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description: |
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Set the speed of a pin. This setting effectively limits the
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slew rate of the output signal. Hardware default configuration is low.
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Fast slew rate could support fast speed pins, like as SPI CLK up to 50MHz.
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digital-path-disable:
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type: boolean
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description: disable digital path on a pin.
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