zephyr/dts/arm64/broadcom/bcm2711.dtsi

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/*
* Copyright 2023 honglin leng <a909204013@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <freq.h>
#include <arm64/armv8-a.dtsi>
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0>;
};
};
interrupt-parent = <&gic>;
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>,
<GIC_PPI 14 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>,
<GIC_PPI 11 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>,
<GIC_PPI 10 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
};
soc {
sram0: memory@200000 {
device_type = "memory";
compatible = "mmio-sram";
reg = <0x200000 0x80000>;
};
gic: interrupt-controller@ff841000 {
compatible = "arm,gic-v2", "arm,gic";
reg = <0xff841000 0x1000>,
<0xff842000 0x2000>;
interrupt-controller;
#interrupt-cells = <4>;
status = "okay";
};
gpio: gpio@fe200000 {
compatible = "simple-bus";
reg = <0xfe200000 0xf4>;
#address-cells = <1>;
#size-cells = <0>;
/* GPIO 0 ~ 27 */
gpio0: gpio@0 {
compatible = "brcm,bcm2711-gpio";
reg = <0>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <28>;
status = "disabled";
};
/* GPIO 28 ~ 45 */
gpio1: gpio@1c {
compatible = "brcm,bcm2711-gpio";
reg = <28>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <18>;
status = "disabled";
};
};
uart1: uart@fe215040 {
compatible = "brcm,bcm2711-aux-uart";
reg = <0xfe215040 0x40>;
clock-frequency = <DT_FREQ_M(500)>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
status = "disabled";
};
};
};