bc8524eb82
This commit addresses the following issues: 1. Add a new Kconfig configuration for specifying Dual-redundant Core Lock-step (DCLS) processor topology. 2. Register initialisation is only required when Dual-redundant Core Lock-step (DCLS) is implemented in hardware. This initialisation is required on DCLS only because the architectural registers are in an indeterminate state after reset and therefore the initial register state of the two parallel executing cores are not guaranteed to be identical, which can lead to DCCM detecting it as a hardware fault. A conditional compilation check for this hardware configuration using the newly added CONFIG_CPU_HAS_DCLS flag has been added. 3. The existing CPU register initialisation code did not take into account the banked registers for every execution mode. The new implementation ensures that all architectural registers of every mode are initialised. 4. Add VFP register initialisation for when floating-point support is enabled and the core is configured in DCLS topology. This initialisation sequence is required for the same reason given in the first issue. 5. Add provision for platform-specific initialisation on Cortex-R using PLATFORM_SPECIFIC_INIT config and z_platform_init function. 6. Remove seemingly pointless and inadequately defined STACK_MARGIN. Not only does it violate the 8-byte stack alignment rule, it does not provide any form of real stack protection. Signed-off-by: Stephanos Ioannidis <root@stephanos.io> |
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| arc | ||
| arm | ||
| common | ||
| nios2 | ||
| posix | ||
| riscv | ||
| x86 | ||
| xtensa | ||
| CMakeLists.txt | ||
| Kconfig | ||