24 lines
655 B
C
24 lines
655 B
C
/*
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* Copyright (c) 2018 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_PLIC_H_
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#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_PLIC_H_
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#include <soc.h>
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#define PLIC_IRQS (CONFIG_NUM_IRQS - RISCV_MAX_GENERIC_IRQ)
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#define PLIC_EN_SIZE ((PLIC_IRQS >> 5) + 1)
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/* Mi-V definitons for the PLIC */
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#if defined(CONFIG_SOC_SERIES_RISCV32_MIV)
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#define PLIC_REG_BASE_ADDR MIV_PLIC_REG_BASE_ADDR
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#define PLIC_IRQ_EN_BASE_ADDR MIV_PLIC_IRQ_EN_BASE_ADDR
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#define PLIC_PRIO_BASE_ADDR MIV_PLIC_PRIO_BASE_ADDR
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#define PLIC_MAX_PRIORITY MIV_PLIC_MAX_PRIORITY
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#endif
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#endif
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