75 lines
1.6 KiB
ArmAsm
75 lines
1.6 KiB
ArmAsm
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Watchdog initialization for kv5x platform
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*
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* This module initializes the watchdog for the kv5x platform.
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*/
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#include <soc.h>
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#include <toolchain.h>
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#include <linker/sections.h>
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_ASM_FILE_PROLOGUE
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GTEXT(z_arm_watchdog_init)
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/* watchdog register offsets */
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#define WDOG_SCTRL_HI_OFFSET 0x0
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#define WDOG_UNLOCK_OFFSET 0xE
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/* watchdog command words */
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#define WDOG_UNLOCK_1_CMD 0xC520
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#define WDOG_UNLOCK_2_CMD 0xD928
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/**
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*
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* @brief Watchdog timer disable routine
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*
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* This routine will disable the watchdog timer.
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*
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* @return N/A
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*/
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SECTION_FUNC(TEXT,z_arm_watchdog_init)
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/*
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* NOTE: DO NOT SINGLE STEP THROUGH THIS FUNCTION!!!
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* There are timing requirements for the execution of the unlock process.
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* Single stepping through the code will cause the CPU to reset.
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*/
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/*
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* First unlock the watchdog so that we can write to registers.
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*
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* This sequence must execute within 20 clock cycles, so disable
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* interrupts to keep the code atomic and ensure the timing.
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*/
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ldr r0, =PERIPH_ADDR_BASE_WDOG
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movw r1, #WDOG_UNLOCK_1_CMD
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strh r1, [r0, #WDOG_UNLOCK_OFFSET]
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movw r1, #WDOG_UNLOCK_2_CMD
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strh r1, [r0, #WDOG_UNLOCK_OFFSET]
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/*
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* Disable the watchdog.
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*
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* Writes to control/configuration registers must execute within
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* 256 clock cycles after unlocking.
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*/
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ldrh r1, [r0, #WDOG_SCTRL_HI_OFFSET]
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mov r2, #1
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bics r1, r2
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strh r1, [r0, #WDOG_SCTRL_HI_OFFSET]
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bx lr
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