37 lines
544 B
Plaintext
37 lines
544 B
Plaintext
/*
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* Copyright (c) 2023, Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <intel/intel_socfpga_agilex5.dtsi>
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/ {
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model = "Intel SoC FPGA Agilex5";
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compatible = "intel,socfpga-agilex5";
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,sram = &mem0;
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};
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};
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&sdmmc {
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status = "okay";
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mmc {
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/*SD Disk Access */
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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};
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};
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&uart0 {
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status = "okay";
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current-speed = <115200>;
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};
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