Nicolas Pitre 6935ea54d5 Revert "arch: riscv: Enable builds without the multithreading" ... This reverts commit f0b458a619. This is a pointless change that simply increases footprint. Existing code already supports compilation without multithreading. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>		2023-05-26 09:04:30 -04:00
..
offsets	riscv: integrate the new FPU context switching support	2023-01-24 15:26:18 +01:00
CMakeLists.txt	riscv: integrate the new FPU context switching support	2023-01-24 15:26:18 +01:00
asm_macros.inc	riscv: abstract RV32E register access	2022-06-23 13:12:05 -04:00
coredump.c	riscv: Introduce support for RV32E	2022-06-08 18:50:22 +09:00
cpu_idle.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
fatal.c	include: types: remove ulong_t	2022-09-06 18:16:33 +02:00
fpu.S	riscv: smarter FPU context switching support	2023-01-24 15:26:18 +01:00
fpu.c	riscv: FPU switching fixes	2023-01-30 23:47:36 +00:00
irq_manage.c	riscv: refactor: Utilize the available helper macro	2023-04-21 12:54:55 +02:00
irq_offload.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
isr.S	Revert "arch: riscv: Enable builds without the multithreading"	2023-05-26 09:04:30 -04:00
pmp.S	include: types: remove ulong_t	2022-09-06 18:16:33 +02:00
pmp.c	riscv: pmp: provision for implementations with partial PMP support	2023-02-20 10:57:11 +01:00
prep_c.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
reboot.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
reset.S	riscv: enable booting from non-zero indexed RISC-V hart	2023-01-30 23:45:35 +00:00
semihost.c	arch: riscv: Align semihost_exec function at 16-byte boundary	2022-08-08 10:52:34 +02:00
smp.c	riscv: prevent possible deadlock on SMP with FPU sharing	2023-05-25 08:25:11 +00:00
switch.S	riscv: integrate the new FPU context switching support	2023-01-24 15:26:18 +01:00
thread.c	Revert "arch: riscv: Enable builds without the multithreading"	2023-05-26 09:04:30 -04:00
tls.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
userspace.S	asm: update files with <zephyr/...> include prefix	2022-05-09 12:45:29 -04:00
vector_table.ld	arch: riscv: core: Place vectors section through zephyr_linker_sources()	2022-09-08 10:39:31 +02:00