67 lines
2.0 KiB
YAML
67 lines
2.0 KiB
YAML
# Copyright (c) 2020, Linaro limited
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# SPDX-License-Identifier: Apache-2.0
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description: |
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STM32 QSPI Flash controller supporting the JEDEC CFI interface
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Representation of a serial flash on a quadspi bus:
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mx25r6435f: qspi-nor-flash@0 {
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compatible = "st,stm32-qspi-nor";
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reg = <0>;
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qspi-max-frequency = <80000000>;
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size = <0x4000000>;
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reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
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reset-gpios-duration = <1>;
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spi-bus-width = <4>;
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status = "okay";
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};
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compatible: "st,stm32-qspi-nor"
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include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
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on-bus: qspi
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properties:
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reg:
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required: true
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qspi-max-frequency:
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type: int
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required: true
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description: Maximum clock frequency of device's QSPI interface in Hz
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size:
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required: true
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description: Flash Memory size in bits
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reset-gpios:
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type: phandle-array
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description: RESETn pin
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reset-gpios-duration:
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type: int
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description: The duration (in ms) for the flash memory reset pulse
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reset-cmd:
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type: boolean
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description: Send reset command on initialization
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reset-cmd-wait:
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type: int
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default: 10
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description: The duration (in us) to wait after reset command
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spi-bus-width:
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type: int
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description: The width of (Q)SPI bus to which flash memory is connected.
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Now only value of 4 (when using SIO[0123]) is supported.
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writeoc:
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type: string
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enum:
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- "PP_1_1_4" # Quad data line SPI, PP 1-1-4 (0x32)
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- "PP_1_4_4" # Quad data line SPI, PP 1-4-4 (0x38)
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description: |
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The value encodes number of I/O lines used for the opcode,
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address, and data.
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There is no info about quad page program opcodes in the SFDP
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tables, hence it has been assumed that NOR flash memory
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supporting 1-4-4 mode also would support fast page programming.
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If absent, then 1-4-4 program page is used in quad mode.
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