34 lines
870 B
C
34 lines
870 B
C
/*
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* Copyright (c) 2022 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/device.h>
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#include <zephyr/drivers/clock_control/clock_control_adsp.h>
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#include <zephyr/drivers/clock_control.h>
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static int cavs_clock_ctrl_set_rate(const struct device *clk,
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clock_control_subsys_t sys,
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clock_control_subsys_rate_t rate)
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{
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uint32_t freq_idx = (uint32_t)rate;
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return adsp_clock_set_cpu_freq(freq_idx);
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}
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static int cavs_clock_ctrl_init(const struct device *dev)
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{
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/* Nothing to do. All initialisation should've been handled
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* by SOC level driver.
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*/
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return 0;
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}
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static const struct clock_control_driver_api cavs_clock_api = {
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.set_rate = cavs_clock_ctrl_set_rate
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};
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DEVICE_DT_DEFINE(DT_NODELABEL(clkctl), &cavs_clock_ctrl_init, NULL,
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NULL, NULL, POST_KERNEL,
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CONFIG_CLOCK_CONTROL_INIT_PRIORITY, &cavs_clock_api);
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