Wilfried Chauveau 29ffaaa0b6 arch: arm: cortex_m: Remove CPU_HAS_*CACHE from CPU_CORTEX_M7 ... Caches are optional on cortex-m7, having CPU_HAS_*CACHE in CPU_CORTEX_M7 definition renders them mandatory. Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>		2023-12-05 10:19:15 +00:00
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cortex_a_r	arch: cortex_ar: Introduce SMP support into Cortex-A/R aarch32	2023-11-06 15:32:01 -06:00
cortex_m	arch: arm: cortex_m: Remove CPU_HAS_*CACHE from CPU_CORTEX_M7	2023-12-05 10:19:15 +00:00
mmu	kernel: mm: move kernel mm functions under kernel includes	2023-11-20 09:19:14 +01:00
mpu	arch: arm: remove num-mpu-regions	2023-12-01 10:48:00 +00:00
offsets	arch: arm: cortex_a_r: introduce USE_SWITCH	2023-11-06 15:32:01 -06:00
CMakeLists.txt	…
Kconfig	tfm: Remove limitation of enabling FP when build TF-M NS application	2023-11-23 10:01:22 +01:00
Kconfig.vfp	…
__aeabi_atexit.c	…
elf.c	llext: use elf_rela_t instead of elf_rel_t	2023-11-09 18:21:27 +01:00
fatal.c	…
header.S	…
irq_offload.c	…
nmi.c	…
nmi_on_reset.S	…
tls.c	…
userspace.S	…
vector_table.ld	…
zimage_header.ld	…