108 lines
2.6 KiB
Plaintext
108 lines
2.6 KiB
Plaintext
# ETH_MCUX Ethernet driver configuration options
|
|
|
|
# Copyright (c) 2016-2017 ARM Ltd
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
menuconfig ETH_MCUX
|
|
bool "MCUX Ethernet driver"
|
|
depends on HAS_MCUX_ENET
|
|
select NOCACHE_MEMORY if HAS_MCUX_CACHE
|
|
select ARM_MPU if CPU_CORTEX_M7
|
|
select NET_POWER_MANAGEMENT if DEVICE_POWER_MANAGEMENT
|
|
help
|
|
Enable MCUX Ethernet driver. Note, this driver performs one shot PHY
|
|
setup. There is no support for PHY disconnect, reconnect or
|
|
configuration change.
|
|
|
|
if ETH_MCUX
|
|
|
|
config ETH_MCUX_PROMISCUOUS_MODE
|
|
bool "Enable promiscuous mode"
|
|
help
|
|
Place the Ethernet receiver in promiscuous mode. This may be useful
|
|
for debugging and not needed for normal work.
|
|
|
|
config ETH_MCUX_RMII_EXT_CLK
|
|
bool "Enable RMII clock from external sources"
|
|
help
|
|
Setting this option will configure MCUX clock block to feed RMII
|
|
reference clock from external source (ENET_1588_CLKIN)
|
|
|
|
config ETH_MCUX_PHY_TICK_MS
|
|
int "PHY poll period (ms)"
|
|
default 1000
|
|
range 100 30000
|
|
help
|
|
Set the PHY status polling period.
|
|
|
|
config ETH_MCUX_PHY_EXTRA_DEBUG
|
|
bool "Enable additional detailed PHY debug"
|
|
help
|
|
Enable additional PHY related debug information related to
|
|
PHY status polling.
|
|
|
|
config ETH_MCUX_RX_BUFFERS
|
|
int "Number of MCUX RX buffers"
|
|
default 1
|
|
range 1 16
|
|
help
|
|
Set the number of RX buffers provided to the MCUX driver.
|
|
|
|
config ETH_MCUX_TX_BUFFERS
|
|
int "Number of MCUX TX buffers"
|
|
default 1
|
|
range 1 1
|
|
help
|
|
Set the number of TX buffers provided to the MCUX driver.
|
|
|
|
config ETH_MCUX_0
|
|
bool "MCUX Ethernet port 0"
|
|
help
|
|
Include port 0 driver
|
|
|
|
config ETH_MCUX_1
|
|
bool "MCUX Ethernet port 1"
|
|
depends on SOC_MIMXRT1062 || SOC_MIMXRT1064
|
|
help
|
|
Include port 1 driver
|
|
|
|
config ETH_MCUX_HW_ACCELERATION
|
|
bool "Enable hardware acceleration"
|
|
help
|
|
Enable hardware acceleration for the following:
|
|
- IPv4, UDP and TCP checksum (both Rx and Tx)
|
|
|
|
config PTP_CLOCK_MCUX
|
|
bool "MCUX PTP clock driver support"
|
|
default y
|
|
depends on PTP_CLOCK && NET_PKT_TIMESTAMP
|
|
help
|
|
Enable MCUX PTP clock support.
|
|
|
|
if PTP_CLOCK_MCUX
|
|
|
|
config ETH_MCUX_PTP_RX_BUFFERS
|
|
int "Size of the RX timestamp ring buffer"
|
|
default 10
|
|
help
|
|
Set the number of RX buffers provided to the MCUX driver
|
|
to store timestamps.
|
|
|
|
config ETH_MCUX_PTP_TX_BUFFERS
|
|
int "Size of the TX timestamp ring buffer"
|
|
default 10
|
|
help
|
|
Set the number of TX buffers provided to the MCUX driver
|
|
to store timestamps.
|
|
|
|
config ETH_MCUX_PTP_CLOCK_SRC_HZ
|
|
int "Frequency of the clock source for the PTP timer"
|
|
default 50000000
|
|
help
|
|
Set the frequency in Hz sourced to the PTP timer.
|
|
If the value is set properly, the timer will be accurate.
|
|
|
|
endif # PTP_CLOCK_MCUX
|
|
|
|
endif # ETH_MCUX
|