111 lines
3.2 KiB
C
111 lines
3.2 KiB
C
/*
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* Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _MEC_VCI_H
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#define _MEC_VCI_H
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#include <stdint.h>
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#include <stddef.h>
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/* VCI Config register */
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#define MCHP_VCI_CFG_REG_OFS 0u
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#define MCHP_VCI_CFG_REG_MASK 0x71f8fu
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#define MCHP_VCI_CFG_IN_MASK 0x7fu
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#define MCHP_VCI_CFG_IN0_HI 0x01u
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#define MCHP_VCI_CFG_IN1_HI 0x02u
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#define MCHP_VCI_CFG_IN2_HI 0x04u
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#define MCHP_VCI_CFG_IN3_HI 0x08u
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#define MCHP_VCI_CFG_IN4_HI 0x10u
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#define MCHP_VCI_VCI_OVRD_IN_HI BIT(8)
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#define MCHP_VCI_VCI_OUT_HI BIT(9)
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#define MCHP_VCI_FW_CTRL_EN BIT(10)
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#define MCHP_VCI_FW_EXT_SEL BIT(11)
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#define MCHP_VCI_FILTER_BYPASS BIT(12)
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#define MCHP_VCI_WEEK_ALARM BIT(16)
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#define MCHP_VCI_RTC_ALARM BIT(17)
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#define MCHP_VCI_SYS_PWR_PRES BIT(18)
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/* VCI Latch Enable register */
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/* VCI Latch Reset register */
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#define MCHP_VCI_LE_REG_OFS 4u
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#define MCHP_VCI_LR_REG_OFS 8u
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#define MCHP_VCI_LER_REG_MASK 0x3007fu
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#define MCHP_VCI_LER_IN_MASK 0x7fu
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#define MCHP_VCI_LER_IN0 0x01u
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#define MCHP_VCI_LER_IN1 0x02u
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#define MCHP_VCI_LER_IN2 0x04u
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#define MCHP_VCI_LER_IN3 0x08u
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#define MCHP_VCI_LER_IN4 0x10u
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#define MCHP_VCI_LER_WEEK_ALARM BIT(16)
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#define MCHP_VCI_LER_RTC_ALARM BIT(17)
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/* VCI Input Enable register */
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#define MCHP_VCI_INPUT_EN_REG_OFS 0x0cu
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#define MCHP_VCI_INPUT_EN_REG_MASK 0x7fu
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#define MCHP_VCI_INPUT_EN_IE_MASK 0x7fu
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#define MCHP_VCI_INPUT_EN_IN0 0x01u
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#define MCHP_VCI_INPUT_EN_IN1 0x02u
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#define MCHP_VCI_INPUT_EN_IN2 0x04u
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#define MCHP_VCI_INPUT_EN_IN3 0x08u
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#define MCHP_VCI_INPUT_EN_IN4 0x10u
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/* VCI Hold Off Count register */
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#define MCHP_VCI_HDO_REG_OFS 0x10u
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#define MCHP_VCI_HDO_REG_MASK 0xffu
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/* VCI Polarity register */
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#define MCHP_VCI_POL_REG_OFS 0x14u
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#define MCHP_VCI_POL_REG_MASK 0x7fu
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#define MCHP_VCI_POL_IE30_MASK 0x0Fu
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#define MCHP_VCI_POL_ACT_HI_IN0 0x01u
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#define MCHP_VCI_POL_ACT_HI_IN1 0x02u
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#define MCHP_VCI_POL_ACT_HI_IN2 0x04u
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#define MCHP_VCI_POL_ACT_HI_IN3 0x08u
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#define MCHP_VCI_POL_ACT_HI_IN4 0x10u
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/* VCI Positive Edge Detect register */
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#define MCHP_VCI_PDET_REG_OFS 0x18u
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#define MCHP_VCI_PDET_REG_MASK 0x7fu
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#define MCHP_VCI_PDET_IN0 0x01u
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#define MCHP_VCI_PDET_IN1 0x02u
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#define MCHP_VCI_PDET_IN2 0x04u
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#define MCHP_VCI_PDET_IN3 0x08u
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#define MCHP_VCI_PDET_IN4 0x10u
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/* VCI Positive Edge Detect register */
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#define MCHP_VCI_NDET_REG_OFS 0x1cu
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#define MCHP_VCI_NDET_REG_MASK 0x7fu
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#define MCHP_VCI_NDET_IN0 0x01u
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#define MCHP_VCI_NDET_IN1 0x02u
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#define MCHP_VCI_NDET_IN2 0x04u
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#define MCHP_VCI_NDET_IN3 0x08u
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#define MCHP_VCI_NDET_IN4 0x10u
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/* VCI Buffer Enable register */
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#define MCHP_VCI_BEN_REG_OFS 0x20u
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#define MCHP_VCI_BEN_REG_MASK 0x7fu
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#define MCHP_VCI_BEN_IE30_MASK 0x0fu
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#define MCHP_VCI_BEN_IN0 0x01u
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#define MCHP_VCI_BEN_IN1 0x02u
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#define MCHP_VCI_BEN_IN2 0x04u
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#define MCHP_VCI_BEN_IN3 0x08u
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#define MCHP_VCI_BEN_IN4 0x10u
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/** @brief VBAT powered control interface (VCI) */
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struct vci_regs {
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volatile uint32_t CONFIG;
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volatile uint32_t LATCH_EN;
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volatile uint32_t LATCH_RST;
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volatile uint32_t INPUT_EN;
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volatile uint32_t HOLD_OFF;
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volatile uint32_t POLARITY;
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volatile uint32_t PEDGE_DET;
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volatile uint32_t NEDGE_DET;
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volatile uint32_t BUFFER_EN;
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};
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#endif /* #ifndef _MEC_VCI_H */
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