zephyr/soc/xtensa
Anas Nashif 5cf49956e7 logging: add backend for xtensa simulator
Add backend for the xtensa simulator.

Fixes #10164

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-03-04 10:35:07 -05:00
..
D_108mini interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
D_212GP interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
D_233L interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
XRC_D2PM_5swIrq interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
XRC_FUSION_AON_ALL_LM interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
esp32 dts: xtensa: esp32: Add device tree support. 2019-01-29 09:47:17 -06:00
hifi2_std interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi3_bd5 interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi3_bd5_call0 interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi4_bd7 interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi_mini interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi_mini_4swIrq interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
intel_s1000 xtensa: intel_s1000: turn on XTENSA_ASM2 2019-02-28 14:53:52 -08:00
sample_controller logging: add backend for xtensa simulator 2019-03-04 10:35:07 -05:00