395 lines
9.8 KiB
Plaintext
395 lines
9.8 KiB
Plaintext
/*
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* Copyright (c) 2019, Linaro
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nxp/nxp_rt10xx.dtsi>
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&flexram {
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flexram,num-ram-banks = <4>;
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/* default fuse */
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flexram,bank-spec = <FLEXRAM_OCRAM>,
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<FLEXRAM_OCRAM>,
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<FLEXRAM_DTCM>,
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<FLEXRAM_ITCM>;
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};
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&sysclk {
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clock-frequency = <500000000>;
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};
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&itcm {
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reg = <0x00000000 DT_SIZE_K(32)>;
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};
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&dtcm {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};
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&ocram {
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reg = <0x20200000 DT_SIZE_K(64)>;
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};
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&ccm {
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/delete-node/ arm-podf;
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ipg-podf {
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clock-div = <4>;
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};
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};
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&gpio1 {
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interrupts = <70 0>, <71 0>;
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};
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&gpio5 {
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interrupts = <73 0>;
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};
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&gpt_hw_timer {
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interrupts = <30 0>;
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};
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&gpt2 {
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interrupts = <31 0>;
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gptfreq = <12500000>;
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};
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&edma0 {
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/* Each channel has separate interrupt entry */
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irq-shared-offset = <0>;
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dma-channels = <16>;
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};
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/ {
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soc {
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/* Remove GPIO3-GPIO9, they don't exist on RT1010 */
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/delete-node/ gpio@401c0000;
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/delete-node/ gpio@401c4000;
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/delete-node/ gpio@42000000;
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/delete-node/ gpio@42004000;
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/delete-node/ gpio@42008000;
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/delete-node/ gpio@4200c000;
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/* Fixup GPIO2 its a different location on RT1010 */
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/delete-node/ gpio@401bc000;
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gpio2: gpio@42000000 {
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compatible = "nxp,imx-gpio";
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reg = <0x42000000 0x4000>;
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interrupts = <72 0>;
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gpio-controller;
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#gpio-cells = <2>;
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pinmux = <&iomuxc_gpio_sd_00_gpio2_io00>,
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<&iomuxc_gpio_sd_01_gpio2_io01>,
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<&iomuxc_gpio_sd_02_gpio2_io02>,
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<&iomuxc_gpio_sd_03_gpio2_io03>,
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<&iomuxc_gpio_sd_04_gpio2_io04>,
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<&iomuxc_gpio_sd_05_gpio2_io05>,
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<&iomuxc_gpio_sd_06_gpio2_io06>,
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<&iomuxc_gpio_sd_07_gpio2_io07>,
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<&iomuxc_gpio_sd_08_gpio2_io08>,
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<&iomuxc_gpio_sd_09_gpio2_io09>,
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<&iomuxc_gpio_sd_10_gpio2_io10>,
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<&iomuxc_gpio_sd_11_gpio2_io11>,
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<&iomuxc_gpio_sd_12_gpio2_io12>,
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<&iomuxc_gpio_sd_13_gpio2_io13>;
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};
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/* Remove Quad TImers, they don't exist on RT1010 */
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/delete-node/ qtmr@401dc000;
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/delete-node/ qtmr@401e0000;
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/delete-node/ qtmr@401e4000;
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/delete-node/ qtmr@401e8000;
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/* Fixup FlexSPI its a different location on RT1010 */
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/delete-node/ spi@402a8000;
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flexspi: spi@400a0000 {
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compatible = "nxp,imx-flexspi";
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reg = <0x400a0000 0x4000>;
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interrupts = <26 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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ahb-bufferable;
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ahb-cacheable;
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status = "disabled";
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clocks = <&ccm IMX_CCM_FLEXSPI_CLK 0x0 0x0>;
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};
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/* Remove SEMC, it doesn't exist on RT1010 */
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/delete-node/ semc0@402f0000;
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/* Fixup LPI2C1 and LPI2C2, they have different base addr on RT1010 */
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/delete-node/ i2c@403f0000;
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/delete-node/ i2c@403f4000;
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lpi2c1: i2c@401a4000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x401a4000 0x4000>;
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interrupts = <28 0>;
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clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 6>;
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status = "disabled";
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};
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lpi2c2: i2c@401a8000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x401a8000 0x4000>;
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interrupts = <29 0>;
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clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 8>;
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status = "disabled";
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};
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/* Remove LPI2C3 & LPI2C4, they don't exist on RT1010 */
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/delete-node/ i2c@403f8000;
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/delete-node/ i2c@403fc000;
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/* Remove LCDIF, it doesn't exist on RT1010 */
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/delete-node/ display-controller@402b8000;
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/* Fixup LPSPI1 and LPSPI2, they have different base addr on RT1010 */
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/delete-node/ spi@40394000;
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/delete-node/ spi@40398000;
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lpspi1: spi@40194000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x40194000 0x4000>;
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interrupts = <32 3>;
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status = "disabled";
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clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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lpspi2: spi@40198000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x40198000 0x4000>;
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interrupts = <33 3>;
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status = "disabled";
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clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/* Remove LPUART5-8, they don't exist on RT1010 */
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/delete-node/ uart@40194000;
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/delete-node/ uart@40198000;
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/delete-node/ uart@4019c000;
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/delete-node/ uart@401a0000;
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/* Remove ADC2, it doesn't exist on RT1010 */
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/delete-node/ adc@400C8000;
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/* RT1010 has only one flexSPI controller */
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/delete-node/ spi@402a4000;
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/* Fixup FlexPWM1 it has different base addr and interrupt numbers on RT1010 */
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/delete-node/ flexpwm@403dc000;
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flexpwm1: flexpwm@401cc000 {
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compatible = "nxp,flexpwm";
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reg = <0x401cc000 0x4000>;
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interrupts = <38 0>;
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flexpwm1_pwm0: pwm0 {
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compatible = "nxp,imx-pwm";
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index = <0>;
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interrupts = <34 0>;
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#pwm-cells = <3>;
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clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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};
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flexpwm1_pwm1: pwm1 {
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compatible = "nxp,imx-pwm";
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index = <1>;
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interrupts = <35 0>;
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#pwm-cells = <3>;
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clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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};
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flexpwm1_pwm2: pwm2 {
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compatible = "nxp,imx-pwm";
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index = <2>;
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interrupts = <36 0>;
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#pwm-cells = <3>;
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clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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};
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flexpwm1_pwm3: pwm3 {
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compatible = "nxp,imx-pwm";
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index = <3>;
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interrupts = <37 0>;
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#pwm-cells = <3>;
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clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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};
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};
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/* Remove FlexPWM2-4, they don't exist on RT1010 */
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/delete-node/ flexpwm@403e0000;
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/delete-node/ flexpwm@403e4000;
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/delete-node/ flexpwm@403e8000;
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/* Remove Ethernet, it doesn't exist on RT1010 */
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/delete-node/ enet@402d8000;
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/* Fixup USB it has different base addr and interrupt numbers on RT1010 */
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/delete-node/ usbd@402e0000;
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usb1: usbd@400e4000 {
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compatible = "nxp,ehci";
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reg = <0x400e4000 0x200>;
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interrupts = <25 1>;
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interrupt-names = "usb_otg";
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clocks = <&usbclk>;
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num-bidir-endpoints = <8>;
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status = "disabled";
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};
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/* Remove USB2, it doesn't exist on RT1010 */
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/delete-node/ usbd@402e0200;
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/* Remove USDHC, they don't exist on RT1010 */
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/delete-node/ usdhc@402c0000;
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/delete-node/ usdhc@402c4000;
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/* Remove CSI, it doesn't exist on RT1010 */
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/delete-node/ csi@402bc000;
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/* Remove FLEXCAN, they don't exist on RT1010 */
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/delete-node/ can@401d0000;
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/delete-node/ can@401d4000;
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/delete-node/ can@401d8000;
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/* Remove WDOG2, it doesn't exist on RT1010 */
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/delete-node/ wdog@400d0000;
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/* Fix SAI1, 3, it has different base addr on RT1010 */
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/delete-node/ sai@40384000;
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/delete-node/ sai@4038c000;
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sai1: sai@401e0000 {
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compatible = "nxp,mcux-i2s";
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#address-cells = <1>;
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#size-cells = <0>;
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#pinmux-cells = <2>;
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reg = <0x401e0000 0x4000>;
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clocks = <&ccm IMX_CCM_SAI1_CLK 0x7C 18>;
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/* Source clock from Audio PLL */
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clock-mux = <2>;
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/* Audio PLL Output Frequency is determined by:
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* (Fref * (DIV_SELECT + NUM/DENOM)) / POST_DIV
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* = (24MHz * (32 + 77 / 100)) / 1 = 786.48 MHz
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*/
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pll-clocks = <&anatop 0x70 0xC000 0>,
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<&anatop 0x70 0x7F 32>,
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<&anatop 0x70 0x180000 1>,
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<&anatop 0x80 0x3FFFFFFF 77>,
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<&anatop 0x90 0x3FFFFFFF 100>;
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pll-clock-names = "src", "lp", "pd", "num", "den";
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/* The maximum input frequency into the SAI mclk input is 300MHz
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* Based on this requirement, pre-div must be at least 3
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* The pre-div and post-div are one less than the actual divide-by amount.
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* A pre-div value of 0x1 results in a pre-divider of
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* (1+1) = 2
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*/
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pre-div = <0x3>;
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podf = <0x0F>;
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pinmuxes = <&iomuxcgpr 0x4 0x80000>;
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interrupts = <56 0>;
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dmas = <&edma0 0 19>, <&edma0 0 20>;
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dma-names = "rx", "tx";
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/* This translates to SAIChannelMask (fsl_sai.c) and
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* cannot be 0
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*/
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nxp,tx-channel = <1>;
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nxp,tx-dma-channel = <0>;
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nxp,rx-dma-channel = <1>;
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status = "disabled";
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};
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sai3: sai@401e8000 {
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compatible = "nxp,mcux-i2s";
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#address-cells = <1>;
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#size-cells = <0>;
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#pinmux-cells = <2>;
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reg = <0x401e8000 0x4000>;
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clocks = <&ccm IMX_CCM_SAI3_CLK 0x7C 22>;
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/* Source clock from Audio PLL */
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clock-mux = <2>;
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pre-div = <0>;
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podf = <63>;
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pll-clocks = <&anatop 0x70 0xC000 0>,
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<&anatop 0x70 0x7F 32>,
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<&anatop 0x70 0x180000 1>,
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<&anatop 0x80 0x3FFFFFFF 77>,
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<&anatop 0x90 0x3FFFFFFF 100>;
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pll-clock-names = "src", "lp", "pd", "num", "den";
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pinmuxes = <&iomuxcgpr 0x4 0x200000>;
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interrupts = <58 0>, <59 0>;
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dmas = <&edma0 0 83>, <&edma0 0 84>;
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dma-names = "rx", "tx";
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nxp,tx-channel = <0>;
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nxp,tx-dma-channel = <5>;
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nxp,rx-dma-channel = <6>;
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status = "disabled";
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};
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/* Remove SAI2, it doesn't exist on RT1010 */
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/delete-node/ sai@40388000;
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};
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};
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/* RT1015 only has two LPSPI blocks */
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/delete-node/ &lpspi3;
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/delete-node/ &lpspi4;
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&gpio1{
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pinmux = <&iomuxc_gpio_00_gpiomux_io00>,
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<&iomuxc_gpio_01_gpiomux_io01>,
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<&iomuxc_gpio_02_gpiomux_io02>,
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<&iomuxc_gpio_03_gpiomux_io03>,
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<&iomuxc_gpio_04_gpiomux_io04>,
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<&iomuxc_gpio_05_gpiomux_io05>,
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<&iomuxc_gpio_06_gpiomux_io06>,
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<&iomuxc_gpio_07_gpiomux_io07>,
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<&iomuxc_gpio_08_gpiomux_io08>,
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<&iomuxc_gpio_09_gpiomux_io09>,
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<&iomuxc_gpio_10_gpiomux_io10>,
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<&iomuxc_gpio_11_gpiomux_io11>,
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<&iomuxc_gpio_12_gpiomux_io12>,
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<&iomuxc_gpio_13_gpiomux_io13>,
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<&iomuxc_gpio_ad_00_gpiomux_io14>,
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<&iomuxc_gpio_ad_01_gpiomux_io15>,
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<&iomuxc_gpio_ad_02_gpiomux_io16>,
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<&iomuxc_gpio_ad_03_gpiomux_io17>,
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<&iomuxc_gpio_ad_04_gpiomux_io18>,
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<&iomuxc_gpio_ad_05_gpiomux_io19>,
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<&iomuxc_gpio_ad_06_gpiomux_io20>,
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<&iomuxc_gpio_ad_07_gpiomux_io21>,
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<&iomuxc_gpio_ad_08_gpiomux_io22>,
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<&iomuxc_gpio_ad_09_gpiomux_io23>,
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<&iomuxc_gpio_ad_10_gpiomux_io24>,
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<&iomuxc_gpio_ad_11_gpiomux_io25>,
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<&iomuxc_gpio_ad_12_gpiomux_io26>,
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<&iomuxc_gpio_ad_13_gpiomux_io27>,
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<&iomuxc_gpio_ad_14_gpiomux_io28>;
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};
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&gpio5{
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pinmux = <&iomuxc_snvs_pmic_on_req_gpio5_io00>;
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};
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&pit0 {
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interrupts = <24 0>;
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};
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