485 lines
11 KiB
Plaintext
485 lines
11 KiB
Plaintext
/*
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* Copyright 2022, 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv8-m.dtsi>
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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#include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
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#include <mem.h>
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#include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-m33f";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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};
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};
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};
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};
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&sram {
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#address-cells = <1>;
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#size-cells = <1>;
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/* lpc55_3x Memory configurations:
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*
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* LPC55x36: RAMX: 16K, SRAM0: 16K, SRAM1: 16K, SRAM2: 32K, SRAM3: 32K, SRAM4: 16K
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*/
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sramx: memory@4000000 {
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compatible = "mmio-sram";
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reg = <0x04000000 DT_SIZE_K(16)>;
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};
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sram0: memory@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 DT_SIZE_K(16)>;
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};
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sram1: memory@20004000 {
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compatible = "mmio-sram";
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reg = <0x20004000 DT_SIZE_K(16)>;
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};
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sram2: memory@20008000 {
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compatible = "mmio-sram";
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reg = <0x20008000 DT_SIZE_K(32)>;
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};
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sram3: memory@20010000 {
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compatible = "mmio-sram";
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reg = <0x20010000 DT_SIZE_K(32)>;
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};
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sram4: memory@20018000 {
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compatible = "mmio-sram";
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reg = <0x20018000 DT_SIZE_K(16)>;
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};
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};
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&peripheral {
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#address-cells = <1>;
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#size-cells = <1>;
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syscon: syscon@0 {
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compatible = "nxp,lpc-syscon";
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reg = <0x0 0x1000>;
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#clock-cells = <1>;
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reset: reset {
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compatible = "nxp,lpc-syscon-reset";
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#reset-cells = <1>;
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};
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};
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iap: flash-controller@34000 {
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compatible = "nxp,iap-fmc553";
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reg = <0x34000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "ok";
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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reg = <0x0 DT_SIZE_K(246)>;
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erase-block-size = <512>;
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write-block-size = <512>;
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};
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flash_reserved: flash@3d800 {
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compatible = "soc-nv-flash";
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reg = <0x0003d800 DT_SIZE_K(10)>;
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status = "disabled";
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};
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boot_rom: flash@3000000 {
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compatible = "soc-nv-flash";
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reg = <0x3000000 DT_SIZE_K(128)>;
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};
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};
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iocon: iocon@1000 {
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compatible = "nxp,lpc-iocon";
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reg = <0x1000 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x1000 0x100>;
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pinctrl: pinctrl {
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compatible = "nxp,lpc-iocon-pinctrl";
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};
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};
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gpio: gpio@8c000 {
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compatible = "nxp,lpc-gpio";
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reg = <0x8c000 0x2488>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio0: gpio@0 {
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compatible = "nxp,lpc-gpio-port";
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int-source = "pint";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0>;
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};
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gpio1: gpio@1 {
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compatible = "nxp,lpc-gpio-port";
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int-source = "pint";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <1>;
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};
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gpio2: gpio@2 {
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compatible = "nxp,lpc-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <2>;
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};
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};
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dma0: dma-controller@82000 {
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compatible = "nxp,lpc-dma";
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reg = <0x82000 0x1000>;
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interrupts = <1 0>;
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dma-channels = <52>;
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nxp,dma-num-of-otrigs = <4>;
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nxp,dma-otrig-base-address = <LPC55S36_DMA0_OTRIG_BASE>;
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nxp,dma-itrig-base-address = <LPC55S36_DMA0_ITRIG_BASE>;
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status = "disabled";
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#dma-cells = <1>;
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};
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dma1: dma-controller@a7000 {
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compatible = "nxp,lpc-dma";
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reg = <0xa7000 0x1000>;
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interrupts = <58 0>;
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dma-channels = <16>;
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nxp,dma-num-of-otrigs = <4>;
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nxp,dma-otrig-base-address = <LPC55S36_DMA1_OTRIG_BASE>;
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nxp,dma-itrig-base-address = <LPC55S36_DMA1_ITRIG_BASE>;
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status = "disabled";
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#dma-cells = <1>;
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};
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pint: pint@4000 {
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compatible = "nxp,pint";
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reg = <0x4000 0x1000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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interrupts = <4 2>, <5 2>, <6 2>, <7 2>,
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<32 2>, <33 2>, <34 2>, <35 2>;
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num-lines = <8>;
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num-inputs = <64>;
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};
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flexcomm0: flexcomm@86000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x86000 0x1000>;
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interrupts = <14 0>;
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clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 11)>;
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dmas = <&dma0 4>, <&dma0 5>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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flexcomm1: flexcomm@87000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x87000 0x1000>;
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interrupts = <15 0>;
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clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 12)>;
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dmas = <&dma0 6>, <&dma0 7>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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flexcomm2: flexcomm@88000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x88000 0x1000>;
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interrupts = <16 0>;
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clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 13)>;
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dmas = <&dma0 10>, <&dma0 11>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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flexcomm3: flexcomm@89000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x89000 0x1000>;
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interrupts = <17 0>;
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clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 14)>;
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dmas = <&dma0 8>, <&dma0 9>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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flexcomm4: flexcomm@8a000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x8a000 0x1000>;
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interrupts = <18 0>;
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clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 15)>;
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dmas = <&dma0 12>, <&dma0 13>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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flexcomm5: flexcomm@96000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x96000 0x1000>;
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interrupts = <19 0>;
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clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 16)>;
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dmas = <&dma0 14>, <&dma0 15>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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flexcomm6: flexcomm@97000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x97000 0x1000>;
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interrupts = <20 0>;
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clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 17)>;
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dmas = <&dma0 16>, <&dma0 17>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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flexcomm7: flexcomm@98000 {
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compatible = "nxp,lpc-flexcomm";
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reg = <0x98000 0x1000>;
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interrupts = <21 0>;
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clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 18)>;
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dmas = <&dma0 18>, <&dma0 19>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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hs_lspi: spi@9f000 {
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compatible = "nxp,lpc-spi";
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reg = <0x9f000 0x1000>;
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interrupts = <59 0>;
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clocks = <&syscon MCUX_HS_SPI_CLK>;
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resets = <&reset NXP_SYSCON_RESET(2, 28)>;
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dmas = <&dma0 2>, <&dma0 3>;
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dma-names = "rx", "tx";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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adc0: adc@A0000 {
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compatible = "nxp,lpc-lpadc";
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reg = <0xA0000 0x1000>;
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interrupts = <22 0>;
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status = "disabled";
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clk-divider = <8>;
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clk-source = <0>;
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voltage-ref= <1>;
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calibration-average = <128>;
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power-level = <0>;
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offset-value-a = <10>;
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offset-value-b = <10>;
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#io-channel-cells = <1>;
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dmas = <&dma0 21>, <&dma0 22>;
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dma-names = "adc0-dma0", "adc0-dma1";
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nxp,references = <&vref0 1800>;
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clocks = <&syscon MCUX_LPADC1_CLK>;
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};
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dac0: dac@b2000 {
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compatible = "nxp,lpdac";
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reg = < 0xb2000 0x1000>;
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interrupts = <74 0>;
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status = "disabled";
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voltage-reference = <0>;
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#io-channel-cells = <1>;
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};
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dac1: dac@b6000 {
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compatible = "nxp,lpdac";
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reg = < 0xb6000 0x1000>;
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interrupts = <75 0>;
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status = "disabled";
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voltage-reference = <0>;
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#io-channel-cells = <1>;
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};
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dac2: dac@b9000 {
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compatible = "nxp,lpdac";
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reg = < 0xb9000 0x1000>;
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interrupts = <76 0>;
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status = "disabled";
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voltage-reference = <0>;
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#io-channel-cells = <1>;
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};
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can0: can@4009d000 {
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compatible = "nxp,lpc-mcan";
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reg = <0x4009d000 0x1000>;
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interrupts = <43 0>, <44 0>;
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interrupt-names = "int0", "int1";
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clocks = <&syscon MCUX_MCAN_CLK>;
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resets = <&reset NXP_SYSCON_RESET(1, 7)>;
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bosch,mram-cfg = <0x0 15 15 8 8 0 15 15>;
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status = "disabled";
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};
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flexpwm0: flexpwm@400C3000 {
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compatible = "nxp,flexpwm";
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reg = <0x400C3000 0x1000>;
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interrupt-names = "INPUT-CAPTURE", "FAULT", "RELOAD-ERROR";
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interrupts = <80 0>, <81 0>, <82 0>;
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flexpwm0_pwm0: pwm0 {
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compatible = "nxp,imx-pwm";
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index = <0>;
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interrupt-names = "COMPARE-SUB0", "RELOAD-SUB0";
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interrupts = <83 0>, <84 0>;
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#pwm-cells = <3>;
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clocks = <&syscon MCUX_BUS_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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run-in-wait;
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};
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flexpwm0_pwm1: pwm1 {
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compatible = "nxp,imx-pwm";
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index = <1>;
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interrupt-names = "COMPARE-SUB1", "RELOAD-SUB1";
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interrupts = <85 0>, <86 0>;
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#pwm-cells = <3>;
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clocks = <&syscon MCUX_BUS_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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run-in-wait;
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};
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flexpwm0_pwm2: pwm2 {
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compatible = "nxp,imx-pwm";
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index = <2>;
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interrupt-names = "COMPARE-SUB2", "RELOAD-SUB2";
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interrupts = <87 0>, <88 0>;
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#pwm-cells = <3>;
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clocks = <&syscon MCUX_BUS_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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run-in-wait;
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};
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flexpwm0_pwm3: pwm3 {
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compatible = "nxp,imx-pwm";
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index = <3>;
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interrupt-names = "COMPARE-SUB3", "RELOAD-SUB3";
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interrupts = <89 0>, <90 0>;
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#pwm-cells = <3>;
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clocks = <&syscon MCUX_BUS_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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run-in-wait;
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};
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};
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flexpwm1: flexpwm@400C5000 {
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compatible = "nxp,flexpwm";
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reg = <0x400C5000 0x1000>;
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interrupt-names = "INPUT-CAPTURE", "FAULT", "RELOAD-ERROR";
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interrupts = <91 0>, <92 0>, <93 0>;
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flexpwm1_pwm0: pwm0 {
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compatible = "nxp,imx-pwm";
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index = <0>;
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interrupt-names = "COMPARE-SUB0", "RELOAD-SUB0";
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interrupts = <94 0>, <95 0>;
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#pwm-cells = <3>;
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clocks = <&syscon MCUX_BUS_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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run-in-wait;
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};
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flexpwm1_pwm1: pwm1 {
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compatible = "nxp,imx-pwm";
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index = <1>;
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interrupt-names = "COMPARE-SUB1", "RELOAD-SUB1";
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interrupts = <96 0>, <97 0>;
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#pwm-cells = <3>;
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clocks = <&syscon MCUX_BUS_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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run-in-wait;
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};
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flexpwm1_pwm2: pwm2 {
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compatible = "nxp,imx-pwm";
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index = <2>;
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interrupt-names = "COMPARE-SUB2", "RELOAD-SUB2";
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interrupts = <98 0>, <99 0>;
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#pwm-cells = <3>;
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clocks = <&syscon MCUX_BUS_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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run-in-wait;
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};
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flexpwm1_pwm3: pwm3 {
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compatible = "nxp,imx-pwm";
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index = <3>;
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interrupt-names = "COMPARE-SUB3", "RELOAD-SUB3";
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interrupts = <100 0>, <101 0>;
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#pwm-cells = <3>;
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clocks = <&syscon MCUX_BUS_CLK 0 0>;
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nxp,prescaler = <128>;
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status = "disabled";
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run-in-wait;
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};
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};
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usbfs: usbfs@84000 {
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compatible = "nxp,lpcip3511";
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reg = <0x84000 0x1000>;
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interrupts = <28 0>;
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num-bidir-endpoints = <5>;
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maximum-speed = "full-speed";
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status = "disabled";
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};
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sc_timer: pwm@85000 {
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compatible = "nxp,sctimer-pwm";
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reg = <0x85000 0x1000>;
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interrupts = <12 0>;
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status = "disabled";
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clocks = <&syscon MCUX_SCTIMER_CLK 0 0>;
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prescaler = <2>;
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#pwm-cells = <3>;
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};
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vref0: vref@b5000 {
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compatible = "nxp,vref";
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regulator-name = "lpc55s36-vref";
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reg = <0xb5000 0x30>;
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status = "disabled";
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#nxp,reference-cells = <1>;
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nxp,buffer-startup-delay-us = <400>;
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nxp,bandgap-startup-time-us = <20>;
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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