395 lines
10 KiB
C
395 lines
10 KiB
C
/* Intel x86 GCC specific public inline assembler functions and macros */
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/*
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* Copyright (c) 2015, Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* Either public functions or macros or invoked by public functions */
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#ifndef _ASM_INLINE_GCC_PUBLIC_GCC_H
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#define _ASM_INLINE_GCC_PUBLIC_GCC_H
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/*
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* The file must not be included directly
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* Include nanokernel/cpu.h instead
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*/
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#ifndef _ASMLANGUAGE
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#include <stdint.h>
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#include <stddef.h>
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/*******************************************************************************
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*
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* _do_irq_lock_inline - disable all interrupts on the CPU (inline)
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*
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* This routine disables interrupts. It can be called from either interrupt,
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* task or fiber level. This routine returns an architecture-dependent
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* lock-out key representing the "interrupt disable state" prior to the call;
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* this key can be passed to irq_unlock_inline() to re-enable interrupts.
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*
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* The lock-out key should only be used as the argument to the
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* irq_unlock_inline() API. It should never be used to manually re-enable
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* interrupts or to inspect or manipulate the contents of the source register.
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*
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* WARNINGS
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* Invoking a kernel routine with interrupts locked may result in
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* interrupts being re-enabled for an unspecified period of time. If the
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* called routine blocks, interrupts will be re-enabled while another
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* context executes, or while the system is idle.
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*
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* The "interrupt disable state" is an attribute of a context. Thus, if a
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* fiber or task disables interrupts and subsequently invokes a kernel
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* routine that causes the calling context to block, the interrupt
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* disable state will be restored when the context is later rescheduled
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* for execution.
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*
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* RETURNS: An architecture-dependent lock-out key representing the
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* "interrupt disable state" prior to the call.
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*
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* \NOMANUAL
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*/
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static inline __attribute__((always_inline))
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unsigned int _do_irq_lock_inline(void)
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{
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unsigned int key;
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__asm__ volatile (
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"pushfl;\n\t"
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"cli;\n\t"
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"popl %0;\n\t"
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: "=g" (key)
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:
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: "memory"
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);
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return key;
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}
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/*******************************************************************************
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*
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* _do_irq_unlock_inline - enable all interrupts on the CPU (inline)
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*
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* This routine can be called from either interrupt, task or fiber level.
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* Invoked by kernel or by irq_unlock_inline()
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*
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* RETURNS: N/A
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*
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* \NOMANUAL
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*/
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static inline __attribute__((always_inline))
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void _do_irq_unlock_inline(void)
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{
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__asm__ volatile (
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"sti;\n\t"
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: :
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);
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}
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/*******************************************************************************
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*
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* find_first_set_inline - find first set bit searching from the LSB (inline)
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*
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* This routine finds the first bit set in the argument passed it and
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* returns the index of that bit. Bits are numbered starting
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* at 1 from the least significant bit to 32 for the most significant bit.
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* A return value of zero indicates that the value passed is zero.
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*
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* RETURNS: bit position from 1 to 32, or 0 if the argument is zero.
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*
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* INTERNAL
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* For Intel64 (x86_64) architectures, the 'cmovzl' can be removed
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* and leverage the fact that the 'bsfl' doesn't modify the destination operand
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* when the source operand is zero. The "bitpos" variable can be preloaded
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* into the destination register, and given the unconditional ++bitpos that
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* is performed after the 'cmovzl', the correct results are yielded.
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*/
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static inline __attribute__((always_inline))
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unsigned int find_first_set_inline (unsigned int op)
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{
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int bitpos;
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__asm__ volatile (
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#if !defined(CONFIG_CMOV_UNSUPPORTED)
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"bsfl %1, %0;\n\t"
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"cmovzl %2, %0;\n\t"
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: "=r" (bitpos)
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: "rm" (op), "r" (-1)
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: "cc"
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#else
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"bsfl %1, %0;\n\t"
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"jnz 1f;\n\t"
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"movl $-1, %0;\n\t"
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"1:\n\t"
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: "=r" (bitpos)
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: "rm" (op)
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: "cc"
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#endif /* !CONFIG_CMOV_UNSUPPORTED */
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);
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return (bitpos + 1);
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}
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/*******************************************************************************
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*
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* find_last_set_inline - find first set bit searching from the MSB (inline)
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*
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* This routine finds the first bit set in the argument passed it and
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* returns the index of that bit. Bits are numbered starting
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* at 1 from the least significant bit to 32 for the most significant bit.
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* A return value of zero indicates that the value passed is zero.
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*
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* RETURNS: bit position from 1 to 32, or 0 if the argument is zero.
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*
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* INTERNAL
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* For Intel64 (x86_64) architectures, the 'cmovzl' can be removed
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* and leverage the fact that the 'bsfl' doesn't modify the destination operand
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* when the source operand is zero. The "bitpos" variable can be preloaded
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* into the destination register, and given the unconditional ++bitpos that
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* is performed after the 'cmovzl', the correct results are yielded.
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*/
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static inline inline __attribute__((always_inline))
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unsigned int find_last_set_inline (unsigned int op)
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{
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int bitpos;
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__asm__ volatile (
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#if !defined(CONFIG_CMOV_UNSUPPORTED)
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"bsrl %1, %0;\n\t"
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"cmovzl %2, %0;\n\t"
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: "=r" (bitpos)
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: "rm" (op), "r" (-1)
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#else
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"bsrl %1, %0;\n\t"
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"jnz 1f;\n\t"
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"movl $-1, %0;\n\t"
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"1:\n\t"
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: "=r" (bitpos)
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: "rm" (op)
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: "cc"
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#endif /* CONFIG_CMOV_UNSUPPORTED */
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);
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return (bitpos + 1);
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}
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/********************************************************
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*
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* _NanoTscRead - read timestamp register ensuring serialization
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*/
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static inline uint64_t _NanoTscRead(void)
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{
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union {
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struct {
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uint32_t lo;
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uint32_t hi;
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};
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uint64_t value;
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} rv;
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/* rdtsc & cpuid clobbers eax, ebx, ecx and edx registers */
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__asm__ volatile (/* serialize */
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"xorl %%eax,%%eax;\n\t"
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"cpuid;\n\t"
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:
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:
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: "%eax", "%ebx", "%ecx", "%edx"
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);
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/*
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* We cannot use "=A", since this would use %rax on x86_64 and
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* return only the lower 32bits of the TSC
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*/
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__asm__ volatile ("rdtsc" : "=a" (rv.lo), "=d" (rv.hi));
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return rv.value;
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}
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/*******************************************************************************
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*
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* _do_read_cpu_timestamp - get a 32 bit CPU timestamp counter
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*
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* RETURNS: a 32-bit number
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*/
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static inline inline __attribute__((always_inline))
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uint32_t _do_read_cpu_timestamp32(void)
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{
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uint32_t rv;
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__asm__ volatile("rdtsc" : "=a"(rv) : : "%edx");
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return rv;
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}
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/*******************************************************************************
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*
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* sys_out8 - output a byte to an IA-32 I/O port
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*
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* This function issues the 'out' instruction to write a byte to the specified
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* I/O port.
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*
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* RETURNS: N/A
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*
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* NOMANUAL
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*/
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static inline inline __attribute__((always_inline))
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void sys_out8(unsigned char data, unsigned int port)
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{
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__asm__ volatile("outb %%al, %%dx;\n\t" : : "a"(data), "d"(port));
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}
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/*******************************************************************************
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*
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* sys_in8 - input a byte from an IA-32 I/O port
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*
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* This function issues the 'in' instruction to read a byte from the specified
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* I/O port.
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*
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* RETURNS: the byte read from the specified I/O port
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*
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* NOMANUAL
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*/
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static inline inline __attribute__((always_inline))
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unsigned char sys_in8(unsigned int port)
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{
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char retByte;
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__asm__ volatile("inb %%dx, %%al;\n\t" : "=a"(retByte) : "d"(port));
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return retByte;
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}
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/*******************************************************************************
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*
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* sys_out16 - output a word to an IA-32 I/O port
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*
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* This function issues the 'out' instruction to write a word to the
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* specified I/O port.
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*
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* RETURNS: N/A
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*
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* NOMANUAL
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*/
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static inline inline __attribute__((always_inline))
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void sys_out16(unsigned short data, unsigned int port)
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{
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__asm__ volatile("outw %%ax, %%dx;\n\t" : : "a"(data), "d"(port));
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}
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/*******************************************************************************
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*
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* sys_in16 - input a word from an IA-32 I/O port
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*
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* This function issues the 'in' instruction to read a word from the
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* specified I/O port.
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*
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* RETURNS: the word read from the specified I/O port
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*
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* NOMANUAL
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*/
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static inline inline __attribute__((always_inline))
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unsigned short sys_in16(unsigned int port)
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{
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unsigned short retWord;
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__asm__ volatile("inw %%dx, %%ax;\n\t" : "=a"(retWord) : "d"(port));
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return retWord;
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}
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/*******************************************************************************
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*
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* sys_out32 - output a long word to an IA-32 I/O port
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*
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* This function issues the 'out' instruction to write a long word to the
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* specified I/O port.
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*
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* RETURNS: N/A
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*
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* NOMANUAL
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*/
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static inline inline __attribute__((always_inline))
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void sys_out32(unsigned int data, unsigned int port)
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{
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__asm__ volatile("outl %%eax, %%dx;\n\t" : : "a"(data), "d"(port));
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}
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/*******************************************************************************
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*
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* sys_in32 - input a long word from an IA-32 I/O port
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*
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* This function issues the 'in' instruction to read a long word from the
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* specified I/O port.
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*
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* RETURNS: the long read from the specified I/O port
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*
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* NOMANUAL
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*/
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static inline inline __attribute__((always_inline))
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unsigned long sys_in32(unsigned int port)
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{
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unsigned long retLong;
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__asm__ volatile("inl %%dx, %%eax;\n\t" : "=a"(retLong) : "d"(port));
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return retLong;
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}
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#endif /* _ASMLANGUAGE */
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#endif /* _ASM_INLINE_GCC_PUBLIC_GCC_H */
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