90 lines
1.6 KiB
Plaintext
90 lines
1.6 KiB
Plaintext
/*
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* Copyright (c) 2018, Cypress
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m0+";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <1>;
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};
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};
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flash-controller@40250000 {
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compatible = "cypress,psoc6-flash-controller";
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reg = <0x40250000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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label="CYPRESS_FLASH_DRV_NAME";
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flash0: flash@10000000 {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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reg = <0x10000000 DT_SIZE_K(384)>;
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write-block-size = <4>;
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};
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flash1: flash@10060000 {
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compatible = "soc-nv-flash";
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label = "FLASH_1";
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reg = <0x10060000 DT_SIZE_K(640)>;
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write-block-size = <4>;
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};
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};
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sram0: memory@8000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x08000000 DT_SIZE_K(140)>;
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};
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sram1: memory@8023000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x08023000 DT_SIZE_K(4)>;
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};
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sram2: memory@8024000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x08024000 DT_SIZE_K(112)>;
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};
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soc {
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uart5: uart@40660000 {
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compatible = "cypress,psoc6-uart";
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reg = <0x40660000 0x10000>;
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interrupts = <2 1>;
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status = "disabled";
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label = "uart_5";
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};
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uart6: uart@40670000 {
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compatible = "cypress,psoc6-uart";
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reg = <0x40670000 0x10000>;
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interrupts = <2 1>;
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status = "disabled";
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label = "uart_6";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <2>;
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};
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