Sahaj Sarup 4dca5285f0 arm: board: 96b_stm32_sensor_mez: enable USART3 ... This patchset enables USART3 on the 96Boards STM32 Mezzanine. It is broken out to J10 Grove Connector. Changes: - Enabled USART3 in board dts. - Updated board index.rst with uart pinouts. - soc dtsi: enabled usart3. Test: Tested USART3 as console at 115200 baud Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>		2020-01-03 09:37:08 -06:00
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atmel	soc: atmel_sam0: Add SAME54	2019-11-06 21:18:00 -06:00
cypress	…
microchip	drivers : spi : mec1501 : XEC SPI driver	2019-10-23 19:18:32 -07:00
nordic	soc: arm: nordic: adding ipc aliases for nRF53	2019-11-20 19:29:06 +01:00
nxp	dts: Add spi bindings and nodes for lpc socs	2019-12-10 08:48:56 -06:00
silabs	dts: silabs: Define all available gpio ports for efr32mg12p	2019-11-13 12:05:48 -06:00
st	arm: board: 96b_stm32_sensor_mez: enable USART3	2020-01-03 09:37:08 -06:00
ti	dts: specify cpu frequency for TI CC13X2/CC26X2	2019-11-07 15:55:21 -06:00
xilinx	interrupt_controller: gic: Support PPIs	2019-12-10 06:59:55 +01:00
armv6-m.dtsi	…
armv7-m.dtsi	…
armv7-r.dtsi	arch: arm: Fix incorrect Cortex-R device tree specification.	2019-10-11 16:27:14 +02:00
armv8-m.dtsi	…