838cd28195
The most of the wwdg peripherals requires a reduced apb clock to pass the sample.drivers.watchdog.stm32_wwdg testcase. This apb1 prescaler is added to the overlay file for that particular clock. Specific overlay for the stm32h7 family because of the APB1 bus clock named d2ppre1. Signed-off-by: Francois Ramu <francois.ramu@st.com> |
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disco_l475_iot1.overlay | ||
esp32.conf | ||
esp32s2_saola.conf | ||
gd32_fwdgt.overlay | ||
gd32_wwdgt.overlay | ||
nucleo_f091rc.overlay | ||
stm32_iwdg.overlay | ||
stm32_wwdg.overlay | ||
stm32f3_disco.overlay | ||
stm32h7_wwdg.overlay |