100 lines
2.9 KiB
YAML
100 lines
2.9 KiB
YAML
# Copyright 2020 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: NXP FlexSPI device
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include: [spi-device.yaml, "jedec,jesd216.yaml"]
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properties:
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cs-interval-unit:
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type: int
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required: false
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default: 1
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enum:
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- 1
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- 256
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description: |
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Chip select interval units, in serial clock cycles. See the
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CSINTERVALUNIT field in registers FLASHA1CR0 through FLASHB2CR0. The
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default corresponds to the reset value of the register field.
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cs-interval:
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type: int
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required: false
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default: 0
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description: |
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Minimum interval between chip select deassertion and assertion. See the
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CSINTERVAL field in registers FLASHA1CR0 through FLASHB2CR0. The
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default corresponds to the reset value of the register field.
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cs-setup-time:
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type: int
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required: false
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default: 3
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description: |
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Chip select setup time, in serial clock cycles. See the TCSS field in
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registers FLASHA1CR0 through FLASHB2CR0. The default corresponds to the
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reset value of the register field.
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cs-hold-time:
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type: int
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required: false
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default: 3
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description: |
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Chip select hold time, in serial clock cycles. See the TCSH field in
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registers FLASHA1CR0 through FLASHB2CR0. The default corresponds to the
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reset value of the register field.
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data-valid-time:
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type: int
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required: false
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default: 0
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description: |
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Data valid time, in nanoseconds. See the registers DLLACR through
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DLLBCR.
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column-space:
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type: int
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required: false
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default: 0
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description: |
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Column address bit width. Set to zero if the flash does not support
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column address. See the CAS field in registers FLASHA1CR0 through
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FLASHB2CR0. The default corresponds to the reset value of the register
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field.
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word-addressable:
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type: boolean
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required: false
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description: |
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Don't transmit the least significant address bit when the flash is word
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addressable. See the WA field in registers FLASHA1CR0 through
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FLASHB2CR0.
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ahb-write-wait-unit:
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type: int
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required: false
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default: 2
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enum:
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- 2
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- 8
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- 32
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- 128
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- 512
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- 2048
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- 8192
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- 32768
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description: |
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AHB write wait interval units, in AHB clock cycles. See the AWRWAITUNIT
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field in registers FLASHA1CR2 through FLASHB2CR2. The default
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corresponds to the reset value of the register field.
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ahb-write-wait-interval:
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type: int
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required: false
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default: 0
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description: |
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Time to wait between AHB triggered command sequences. See the AWRWAIT
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field in registers FLASHA1CR2 through FLASHB2CR2. The default
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corresponds to the reset value of the register field.
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