90 lines
3.2 KiB
YAML
90 lines
3.2 KiB
YAML
# Copyright (c) 2019, Song Qiang <songqiang1304521@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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description: |
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STM32 DMA controller (V1)
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It is present on stm32 devices like stm32F4 or stm32F2.
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This DMA controller includes FIFO control registers.
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DMA clients connected to the STM32 DMA controller must use the format
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described in the dma.txt file, using a four-cell specifier for each
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channel: a phandle to the DMA controller plus the following four integer cells:
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1. channel: the dma stream from 0 to <dma-requests>
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2. slot: DMA periph request ID, which is written in the DMAREQ_ID of the DMAMUX_CxCR
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this value is 0 for Memory-to-memory transfers
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or a value between <1> .. <dma-generators> (not supported yet)
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or a value beweeen <dma-generators>+1 .. <dma-generators>+<dma-requests>
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3. channel-config: A 32bit mask specifying the DMA channel configuration
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which is device dependent:
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-bit 6-7 : Direction (see dma.h)
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0x0: MEM to MEM
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0x1: MEM to PERIPH
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0x2: PERIPH to MEM
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0x3: reserved for PERIPH to PERIPH
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-bit 9 : Peripheral Increment Address
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0x0: no address increment between transfers
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0x1: increment address between transfers
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-bit 10 : Memory Increment Address
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0x0: no address increment between transfers
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0x1: increment address between transfers
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-bit 11-12 : Peripheral data size
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0x0: Byte (8 bits)
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0x1: Half-word (16 bits)
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0x2: Word (32 bits)
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0x3: reserved
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-bit 13-14 : Memory data size
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0x0: Byte (8 bits)
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0x1: Half-word (16 bits)
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0x2: Word (32 bits)
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0x3: reserved
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-bit 15: Peripheral Increment Offset Size
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0x0: offset size is linked to the peripheral bus width
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0x1: offset size is fixed to 4 (32-bit alignment)
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-bit 16-17 : Priority level
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0x0: low
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0x1: medium
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0x2: high
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0x3: very high
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4. features: A 32bit bitfield value specifying DMA features
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-bit 0-1: DMA FIFO threshold selection
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0x0: 1/4 full FIFO
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0x1: 1/2 full FIFO
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0x2: 3/4 full FIFO
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0x3: full FIFO
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examples for stm32f411
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dma2: dma-controller@40020400 {
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compatible = "st,stm32-dma-v1";
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...
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st,mem2mem;
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dma-requests = <7>;
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status = "disabled";
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};
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For the client part, example for stm32f411 on DMA2 instance
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Tx using stream 5 on channel 3 (stream 2 on channel 2 is also possible)
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Rx using stream 2 on channel 3 (stream 0 on channel 3 is also possible)
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spi1 {
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dmas = <&dma2 5 3 0x28440 0x03>,
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<&dma2 2 3 0x28480 0x03>;
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dma-names = "tx", "rx";
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};
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compatible: "st,stm32-dma-v1"
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include: st,stm32-dma.yaml
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properties:
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"#dma-cells":
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const: 4
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# Parameter syntax of stm32 follows the dma client dts syntax
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# in the Linux kernel declared in
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# https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/plain/Bindings/dma/st,stm32-dma.yaml
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dma-cells:
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- channel
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- slot
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- channel-config
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- features
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